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Document #: 38-08032 Rev. *L Page 59 of 62
13. PCB Layout Recommendations
Follow these recommendations to ensure reliable high perfor-
mance operation:
[24]
■ Four layer impedance controlled boards are required to
maintain signal quality.
■ Specify impedance targets (ask your board vendor what they
can achieve).
■ To control impedance, maintain trace widths and trace spacing.
■ Minimize stubs to minimize reflected signals.
■ Connections between the USB connector shell and signal
ground must be near the USB connector.
■ Bypass and flyback caps on VBus, near connector, are recom-
mended.
■ DPLUS and DMINUS trace lengths should be kept to within 2
mm of each other in length, with preferred length of 20 to
30 mm.
■ Maintain a solid ground plane under the DPLUS and DMINUS
traces. Do not allow the plane to split under these traces.
■ Do not place vias on the DPLUS or DMINUS trace routing.
■ Isolate the DPLUS and DMINUS traces from all other signal
traces by no less than 10 mm.
Package Diagrams (continued)
TOPVIEW
PIN A1CORNER
0.50
3.50
5.00±0.10
BOTTOM VIEW
0.10(4X)
3.50
5.00±0.10
0.50
Ø0.15MC AB
Ø0.05MC
Ø0.30±0.05(56X)
A1CORNER
-B-
-A-
1.0 max
0.160 ~0.260
0.080 C
0.45
SEATING PLANE
0.21
0.10 C
-C-
SIDEVIEW
5.00±0.10
5.00±0.10
REFERENCE JEDEC:MO-195C
PACKAGE WEIGHT:0.02 grams
E
G
H
F
D
C
B
A
13265486
7856 2341
E
G
H
F
D
C
B
A
001-03901-*B
Figure 39. 56 VFBGA (5 x 5 x 1.0 mm) 0.50 Pitch, 0.30 Ball BZ56 (001-03901)
Note
24.Source for recommendations: EZ-USB FX2™PCB Design Recommendations, http://www.cypress.com/cfuploads/support/app_notes/FX2_PCB.pdf and
High-Speed USB Platform Design Guidelines, http://www.usb.org/developers/docs/hs_usb_pdg_r1_0.pdf.
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