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LPe11002 Hardware Installation Manual Page 1
Introduction
The Emulex® LPe11002 host bus adapter (HBA) is a dual-channel, 4.25 gigabit per second (Gb/s), Fibre
Channel (FC) Peripheral Component Interconnect Express (PCIe) HBA. The core technology of this
HBA is Emulex’s eighth generation FC controller. The controller incorporates a multifunction native PCIe
core that is compliant to the PCIe Base Specification 1.0a and PCI Express CEM Specification 1.0a. The
HBA supports packet transfers up to 2048 bytes on the PCIe link with support for x1 or x4 lane
negotiation. The supported physical PCIe connector is x4 or higher (x8 or x16). The two independent,
fully featured FC ports are compliant to various American National Standards Institute (ANSI) FC
standards. The product is targeted at FC storage networking environments that require the highest
degrees of robustness, performance and ease of management.
Major Features
• Multifunction PCIe device with two fully independent FC ports
• Auto-negotiation between 1-Gb, 2-Gb or 4-Gb link attachments
• High performance FC HBA with the PCIe to FC controller with two internal processors
• Full support for all FC topologies including point-to-point, arbitrated loop and fabric
• Full support for FC service class 2 and 3
• Maximum FC throughput achieved via full duplex hardware support
• End-to-end data path-parity and cyclical redundancy check (CRC) protection, including internal
data path random-access memory (RAM)
• Architectural support for multiple upper layer protocols
• State-of-the-art circuitry:
• All PCIe and FC functionality contained within a single, custom, high-density, fully inte-
grated FC controller
• Internal ARM 1136J-S processors with instruction and data cache for each port
• Internal serializer deserializer (SerDes) 1-Gb/2-Gb/4-Gb cores for FC and 2.5-Gb cores
for PCIe
• Complies with the PCIe base and CEM 1.0a specifications:
• x1 or x4 lane link interface (auto-negotiated with system) at 2.5-Gb/s
• Supports VC0 (1 Virtual Channel) and TC0 (1 Traffic Class)
• Configuration /IO/ Memory read/write, completion and message
• Supports 64-bit addressing
• ECRC for all transmitted PCIe data packets
• Link CRC on all PCIe packets and message
information
• Supports large payload size- 2048 bytes for read/write
• Supports large read request size- 4096 bytes
• Internal high-speed static RAM (SRAM)
• Error correcting code (ECC) protection of local memory, including single-bit correction and
double-bit protection
• The LPe11002 HBA provides two embedded short wave optical (LC) connections with link
diagnostics capability.