Epson RTC-72423 A Clock User Manual


 
RTC - 72421 / 72423
Page - 15 MQ - 162 - 03
(A)Starting the count
START
Set the C
F
register
Reg.F
TEST
24/12
STOP
RESET
Reg.D
30 s ADJ
IRQ FLAG
HOLD
To next process
0
0
0
0 or 1
0*00B
This setting is not necessary when
the STD.P pin is not used
0
0
0 or 1
0*00B
Set the IRQ FLAG bit to 0 when fixed-period
interrupt mode is used, or to 1when it is not
used.
Set the C
E
register
Set the C
D
register
(B) Checking the status of the BUSY bit
START
To next process
HOLD bit
1
Read the BUSY bit
BUSY bit=0?
NO
YES
HOLD bit
0
(C)Stopping and resetting the counter
START
To next process
Set the C
F
register
Reg.F
TEST
24/12
STOP
RESET 1
1
0
0 or 1
0*11B