EVGA 650I Computer Hardware User Manual


 
Hardware Installation
45
or type in a new value. Note that the Actual FSB (QDR) reflects the actual
frequency that takes effect on a reboot.
MEM (DDR), MHz
Use the
+ or keys to scroll through new values for the memory frequency
or type in a new value. Note that the
Actual MEM (DDR) reflects the actual
frequency that takes effect when the system reboots.
Memory Timing Setting
Press
Enter to display the Memory Timing Setting menu. Use this menu to
set optimal timings or to manually enter timings.
¾ Optimal
Use the
Page Up and Page Down keys to select Optimal. Optimal
prohibits you from manually setting any timing. All timing is set for
optimal performance.

:Move Enter:Select +/-/PU/PD:Value F10:Save ESC:Exit F1:General Help[
F5: Previous Values F7:Defaults
Parameters Settings Current Value
Memory Timing Setting [Optimal]
x tCL (CAS Latency) Auto(5) 5
x tRDC Auto(7) 5
x tRP Auto(7) 5
x tRAS Auto(23) 18
x Command Per Clock (CDM) Auto(2T) 1T
** Advanced Memory Settings **
x tRRD Auto(4) 3
x tRC Auto(28) 22
x tWR Auto(7) 5
x tWTR Auto(10) 9
x tREF Auto 6.1uS
Item Help
Main Level ``
Select [Expert] to
enter timings manually
Phoenix – AwardBIOS CMOS Setup Utility
Memory Timing Setting