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CHAPTER 3 CPU ARCHITECTURE
3.3.3 Table indirect addressing
[Function]
Table contents (branch destination address) of the particular location to be addressed by bits 1 to 5 of the
immediate data of an operation code are transferred to the program counter (PC) and branched.
Before the CALLT [addr5] instruction is executed, table indirect addressing is performed. This instruction
references an address stored in the memory table at addresses 40H through 7FH, and can branch in the entire
memory space.
[Illustration]
15 1
15 0
PC
70
Low Addr.
High Addr.
Memory (Table)
Effective Address+1
Effective Address
01
00000000
87
87
65 0
0
111
765 10
ta4–0
Operation Code