IBM X3400 M2 Personal Computer User Manual


 
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Drive Bays
The x3400 M2 contains either 11 drive bays (in 2.5-inch models) or 7 bays (in 3.5-inch) models. 2.5-inch
models support small form-factor (SFF) hot-swap SAS drives. 3.5-inch models support four hot-swap
SAS or SATA II drives, or simple-swap SATA II drives. In addition, there are three 5.25-inch bays.
An internal full-high tape drive can be installed using two of the 5.25-inch drive bays; alternatively, an
internal half-high tape drive can be installed using one of the 5.25-inch drive bays. The tape drive must
have a USB 2.0 interface.
A half-high DVD-ROM drive with a SATA interface ships standard in the other 5.25-inch bay. An external
USB floppy drive may be used, if needed.
Hot-swap drives may be inserted or removed through the front of the server without powering off the
system. Simple-swap drives may also be installed and removed through the front, but requires powering
off the server first.
For still more storage, a direct-attach, NAS or SAN external expansion option can be added, using an
optional controller.
Disk/Tape Controllers
All hot-swap x3400 M2 models include an integrated hardware-based IBM ServeRAID-BR10i SAS/SATA
controller. This controller supports up to eight internal SAS or SATA drives. (Simple-swap models use the
SATA support incorporated in the system chipset.)
The integrated ServeRAID-BR10i controller offers hardware RAID-0/1/1E support. The controller provides
data transfer speeds of up to 3Gbps
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per SAS port on an 8-lane 2.5 Gbps PCIe card. It supports both
SAS and SATA HDDs, as well as Solid-State Drives (SSDs) and tape drives.
The x3400 M2 also supports full RAID-0/1/10/1E/5/6 support using the optional ServeRAID-MR10i card. It
also offers higher performance, due to the 256MB battery-backed onboard cache.
The x3400 M2 also supports hardware based full-disk encryption with RAID-0/1/10/1E/5/6 support using
the optional ServeRAID-MR10is Vault card.
For external storage, the ServeRAID-MR10M controller enables connection to up to four IBM System
Storage EXP3000 SAS expansion units (48 HDDs total). It provides RAID-0/1/10/5/50 support and 256MB
of onboard cache.
Internal Backup
The x3400 M2 supports several internal tape backup options. Supported technologies include:
DDS-5 (half-high)
DDS-6 (half-high)
GoVault internal dock (half-high)
LTO-3 Ultrium (half-high)
LTO-4 Ultrium (half-high)
High-Performance Adapter Slots
The x3400 M2 provides six adapter slots in all, including one x16 (“by 16”) physical/x8 electrical PCIe
(PCI Express) Gen 2 full-length/full-height adapter slot (Slot 2). This means that although the slot runs
at x8 Gen 2 speeds (8GBps), it can accept a x16 Gen 2 adapter in the slot. It is also capable of
supporting x1/x4/x8 adapters at full speed. In addition to this slot, the x3400 M2 also includes two x8
physical/x8 electrical Gen 2 slots (8GBps), two x8 physical/x4 electrical Gen 2 slots (4GBps), and one
33MHz legacy PCI slot. As part of a configure-to-order (CTO) build two choices of PCIe riser card can be
added, with either two 133MHz PCI-X slots or one PCIe x8 physical/x4 electrical Gen 1 slot (2GBps).
Slot 1 is a half-length/full-height PCIe slot; slots 2, 3, 4 and 5 are full-length/full-height PCIe slots,
and Slot 6 is a half-length/full-height 33MHz legacy PCI slot. The PCI-X riser contains two full-
length/full-height slots (5 and 6).
PCI Express is a high-performance, low-latency, next-generation serial I/O bus that is rapidly replacing
the older parallel PCI and PCI-X buses. A x16 PCIe Gen 2 adapter offers approximately sixteeen times
the maximum throughput of a 133MHz PCI-X adapter
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. (A x1 Gen 1 adapter offers throughput similar to a
66MHz PCI-X slot.)
Dual-Port Gigabit Ethernet Controller
The x3400 M2 includes one dual-port integrated Broadcom 5709C Gigabit Ethernet controller for up to
10X higher maximum throughput than a 10/100 Ethernet controller, as well as support for PXE 2.0
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Data transfer rates depend on many factors and are often less than the maximum possible.
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Actual throughput will depend on the adapter vendor’s implementation.