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AR-B1890 User’s Manual
32
Advanced Chipset Features
Phoenix – AwardBIOS CMOS Setup Utility
Advanced Chipset Features
Item Help DRAM Timing Selectable [ By SPD ]
CAS Latency Time 4
DRAM RAS# to CAS# Delay 4
DRAM RAS# Precharge 4
Precharge delay (tRAS) 11
System Memory Frequency 533MHz
SLP_S4# Assertion Width [ 4 to 5 Sec. ]
System BIOS cacheable [ Enabled ]
Video BIOS cacheable [ Disabled ]
Memory Hole At 15M-16M [ Disabled ]
PCI Express Root Port Func [ Press Enter ]
** VGA Setting **
PEG/Onchip VGA Control [ Auto ]
On-Chip Frame Buffer Size [ 8MB ]
DVMT Mode [ DVMT ]
DVMT/FIXED Memory Size [ 128MB ]
Boot Display [ Auto ]
Panel Scaling [ Auto ]
Panel Number [ 1 ]
TV Standard [ Off ]
Video Connector [ Automatic ]
TV Format [ Auto ]
FWH Write Protection [ Disabled ]
Onboard LAN1 Control [ Enabled ]
Onboard LAN2 Control [ Enabled ]
Menu Level >
↑↓→←:Move Enter:Select ＋/－/PU/PD:Value F10:Save ESC:Exit F1:General Help
F5:Previous Values F6:Fail-Safe Defaults F7:Optimized Defaults
DRAM Timing Selectable This option refers to the method by which DRAM
timing is select.
CAS Latency Time Do not change the values in this option unless
you change specification of the installed DRAM
or CPU.