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Schematic Diagrams
Intel P965 5/5 Power B - 11
B.Schematic Diagrams
Intel P965 5/5 Power
Sheet 10 of 43
Intel P956 5/5 Power
VCORE 3,5,37
VCCPLL 3
C156
10u_10V_08
C503
0.1u_X7R_04
VCCPLL
1.25VS
3.3VS 2,7,11,12,13,14,15,16,17,18,19,20,21,23,24,25,26,28,29,30,31,37
R128
1_1%_06
R373 1_1%_06
VTT_1.2VS
Z1002
C572
0.1u_X7R_04
C166
0.1u_X7R_04
VCCA_DPLLA
1.25VS 7,18,36
C561
2.2u_6.3V_06
C157
10u_10V_08
VCCA_GPLL
VCCA_DPLLB
R410 *0_04
1.25VS
C568
0.1u_X7R_04
R412 0_04
1.25VS
1.25VS
3.3V 4,7,14,16,17,18,21,22,24,26,30,31,34,36
VCCA_HPLL
1.8V 7,8,11,12,31,34
VCCA_DAC
C504
0.1u_X7R_04
L7 0_06
C565
0.1u_X7R_04
R389 1_1%_06
1.8V
VCCA_DPLLA
C165
10u_10V_08
1.8V
C517
0.1u_X7R_04
L35 0_08
VCCA_GPLL
C558
10u_10V_08
6 OF 9
U6F
82G965
AJ12
AJ11
AJ10
AJ9
AJ8
AJ7
AJ6
AJ5
AJ4
AJ3
AJ2
AH4
AH2
AH1
AG13
AG12
AG11
AG10
AG9
AG8
AG7
AG6
AG5
AG4
AG3
AG2
AF13
AF12
AF11
AD24
AD22
AD20
AC25
AC23
AC21
AC19
AC13
AC6
AB24
AB22
AB20
AA25
AA23
AA21
AA19
AA13
AA3
Y24
Y22
Y20
Y13
Y6
V13
V12
V10
V9
U13
U10
U9
U6
U3
N12
N11
N9
N8
N6
N3
L6
J6
J3
J2
G2
F11
F9
D4
C13
C9
P20
Y11
Y32
B15
C23
V31
A24
A22
C22
B17
AG25
AG24
AG23
AG22
AG21
AG20
AG19
AG18
AG17
AG15
AG14
AF26
AF25
AF24
AF22
AF20
AF18
AF17
AF15
AF14
AE27
AE26
AE25
AE23
AE21
AE19
AE17
AD27
AD26
AD18
AD17
AD15
AD14
AC27
AC26
AC17
AC15
AC14
AB27
AB26
AB18
AB17
AA27
AA26
AA17
AA15
AA14
Y27
Y26
Y18
Y17
Y15
Y14
W27
W26
W25
W23
W21
W19
W18
W17
V27
V26
V25
V24
V23
V22
V21
V20
V19
V18
V17
V15
V14
U26
U25
U24
U23
U22
U21
U20
U19
U18
U17
U15
U14
R20
R18
R17
R15
R14
P15
P14
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_80
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41
VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56
VCC_57
VCC_58
VCC_59
VCC_60
VCC_61
VCC_62
VCC_63
VCC_64
VCC_65
VCC_66
VCC_67
VCC_68
VCC_69
VCC_70
VCC_71
VCC_72
VCC_73
VCC_74
VCC_75
VCC_76
VCC_77
VCC_78
VCC_79
VCC_CL_PLL
VCCA_EXPPLL
VCCA_HPLL
RESERVED_002
VCCA_MPLL
VCCA_DPLLA
VCCA_DPLLB
VCC3_3
VCC_81
VCC_172
VCC_173
VCC_174
VCC_82
VCC_83
VCC_84
VCC_85
VCC_86
VCC_87
VCC_88
VCC_89
VCC_90
VCC_91
VCC_93
VCC_94
VCC_95
VCC_96
VCC_97
VCC_98
VCC_99
VCC_100
VCC_101
VCC_102
VCC_103
VCC_104
VCC_105
VCC_106
VCC_107
VCC_108
VCC_109
VCC_110
VCC_111
VCC_112
VCC_113
VCC_114
VCC_115
VCC_116
VCC_117
VCC_118
VCC_119
VCC_120
VCC_121
VCC_122
VCC_123
VCC_124
VCC_125
VCC_126
VCC_127
VCC_128
VCC_129
VCC_130
VCC_131
VCC_132
VCC_133
VCC_134
VCC_135
VCC_136
VCC_137
VCC_138
VCC_139
VCC_140
VCC_141
VCC_142
VCC_143
VCC_144
VCC_145
VCC_146
VCC_147
VCC_148
VCC_149
VCC_150
VCC_151
VCC_152
VCC_153
VCC_154
VCC_155
VCC_156
VCC_157
VCC_158
VCC_159
VCC_160
VCC_161
VCC_162
VCC_163
VCC_164
VCC_165
VCC_166
VCC_167
VCC_168
VCC_169
VCC_170
VCC_171
C590
0.1u_X7R_04
1.25VS
VCCA_DPLLB
R340
1_1%_06
C589
0.1u_X7R_04
VCCA_HPLL
T
L40 0_06
L6 0_06
C145
0.1u_X7R_04
V_CKDDR
1.25VS
Z1005
VCCA_MPLL
C583
10u_10V_08
R358 0_04
C490
10u_10V_08
L8 0_06
3.3VS
VTT_1.2VS 3,4,5,6,7,18,36,37
L9 0_06
R398
1_1%_06
R409 0_06
C582
10u_10V_08
R339
1_1%_06
L42 0_06
R352 0_06
1.25VS
Z1006
3.3VS
Z1004
1.25VS
Z1003
7 OF 9
U6G
82G965
P29
P27
P26
P24
P23
N29
N26
N24
N23
M29
M24
M23
L24
L23
K24
K23
J24
J23
H24
H23
G26
G24
G23
F26
F24
F23
E29
E27
E26
E23
D29
D28
D27
C30
C29
C27
B30
B29
B28
B27
A30
A28
R27
R26
R24
R23
BC39
BC34
BC30
BC26
BC22
BC18
BC14
BB39
BB37
BB32
BB28
BB26
BB24
BB20
BB18
BB16
BB12
AY32
AW24
AW20
AV26
AV18
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD2
AD1
AC4
AC3
AC2
AE4
AE3
AE2
C17
B16
A16
C21
B21
D16
AL26
AL24
AL23
AL21
AL20
AL18
AL17
AL15
AK30
AK29
AK27
AJ31
AG31
AF31
AD32
AC32
AA32
AJ30
AJ29
AJ27
AG30
AG29
AG27
AG26
AF30
AF29
AF27
AD30
AD29
AC30
AC29
AL12
AL11
AL10
AL9
AL8
AL7
AL6
AL5
AL4
AL3
AL2
AK26
AK24
AK23
AK21
AK20
AK18
AK17
AK15
AK3
AK2
AK1
AJ13
AD31
AC31
AA31
Y31
AJ26
AJ24
AJ23
AJ21
AJ20
AJ18
AJ17
AJ15
AJ14
AA30
AA29
Y30
Y29
V30
V29
U29
U27
AL13
AK14
AL29
AL27
BB41
BA42
AY42
BB42
BA43
AL31
AJ32
VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8
VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25
VTT_26
VTT_27
VTT_28
VTT_29
VTT_30
VTT_31
VTT_32
VTT_33
VTT_34
VTT_35
VTT_36
VTT_37
VTT_38
VTT_39
VTT_40
VTT_41
VTT_42
VTT_43
VTT_44
VTT_45
VTT_46
VCCSM_1
VCCSM_2
VCCSM_3
VCCSM_4
VCCSM_5
VCCSM_6
VCCSM_7
VCCSM_8
VCCSM_9
VCCSM_10
VCCSM_11
VCCSM_12
VCCSM_13
VCCSM_14
VCCSM_15
VCCSM_16
VCCSM_17
VCCSM_18
VCCSM_19
VCCSM_20
VCCSM_21
VCCSM_22
VCC_EXP_1
VCC_EXP_2
VCC_EXP_3
VCC_EXP_4
VCC_EXP_5
VCC_EXP_6
VCC_EXP_7
VCC_EXP_8
VCC_EXP_9
VCC_EXP_10
VCC_EXP_11
VCC_EXP_12
VCC_EXP_13
VCC_EXP_14
VCC_EXP_15
VCC_EXP_16
VCCA_DAC_17
VCCA_DAC_18
VCCA_EXP
VCCD_CRT
VCCDQ_CRT
VSS_1
VCC_CL_1
VCC_CL_2
VCC_CL_3
VCC_CL_4
VCC_CL_5
VCC_CL_6
VCC_CL_7
VCC_CL_8
VCC_CL_9
VCC_CL_10
VCC_CL_11
VCC_CL_12
VCC_CL_13
VCC_CL_14
VCC_CL_15
VCC_CL_16
VCC_CL_17
VCC_CL_18
VCC_CL_19
VCC_CL_20
VCC_CL_21
VCC_CL_22
VCC_CL_23
VCC_CL_24
VCC_CL_25
VCC_CL_26
VCC_CL_27
VCC_CL_28
VCC_CL_29
VCC_CL_30
VCC_CL_31
VCC_CL_32
VCC_CL_33
VCC_CL_34
VCC_CL_35
VCC_CL_36
VCC_CL_37
VCC_CL_38
VCC_CL_39
VCC_CL_40
VCC_CL_41
VCC_CL_42
VCC_CL_43
VCC_CL_44
VCC_CL_45
VCC_CL_46
VCC_CL_47
VCC_CL_48
VCC_CL_49
VCC_CL_50
VCC_CL_51
VCC_CL_52
VCC_CL_53
VCC_CL_54
VCC_CL_55
VCC_CL_56
VCC_CL_57
VCC_CL_58
VCC_CL_59
VCC_CL_60
VCC_CL_61
VCC_CL_62
VCC_CL_63
VCC_CL_64
VCC_CL_65
VCC_CL_66
VCC_CL_67
VCC_CL_68
VCC_CL_69
VCC_CL_70
VCC_CL_71
VCC_CL_72
VCC_CL_73
VCC_CL_74
VCC_CL_75
VCC_CL_76
VCC_CL_77
VCC_CL_78
VCC_CL_79
VCC_SMCLK_1
VCC_SMCLK_2
VCC_SMCLK_3
VCC_SMCLK_4
VCC_SMCLK_5
RESERVED _1
RESERVED _2
Z1001
VCCA_DAC
Z1008
V_CKDDR
C587
10u_10V_08
Z1007
C579
0.1u_X7R_04
VCCA_MPLL