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BIOS SETUP
MI920 User’s Manual 31
DRAM RAS# Precharge
This option sets the number of cycles required for the RAS to
accumulate its charge before the SDRAM refreshes. The default setting
for the Active to Precharge Delay is 3.
Precharge Delay (tRAS)
The default setting for the Precharge Delay is 9.
System Memory Frequency
The default setting is 400MHz.
SLP_S4# Assertion Width
The default setting is 1 to 2 Sec.
System BIOS Cacheable
The setting of Enabled allows caching of the system BIOS ROM at
F000h-FFFFFh, resulting in better system performance. However, if
any program writes to this memory area, a system error may result.
Video BIOS Cacheable
The Setting Enabled allows caching of the video BIOS ROM at
C0000h-F7FFFh, resulting in better video performance. However, if
any program writes to this memory area, a system error may result.
Memory Hole At 15M-16M
In order to improve performance, certain space in memory can be
reserved for ISA cards. This memory must be mapped into the memory
space below 16 MB. The choices are Enabled and Disabled.
On-Chip VGA Setting
The fields under the On-Chip VGA Setting and their default settings are:
PEG/On Chip VGA Control: Auto
On-Chip Frame Buffer Size: 8MB
DVMT Mode: DVTM
DVMT/Fixed Memory Size: 128MB
SDVO Device Setting: LVDS+DVI
SDVO LVDS Protocol: 1Ch SPGW, 24bit
SDVO Panel Number: 1024x768
Boot Display: CRT+DVI
Panel Scaling: Auto
TV Standard: Off
Video Connector: Automatic
TV Format: Auto