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BIOS SETUP
40
MB884 User’s Manual
Advanced Chipset Features
This Setup menu controls the configuration of the chipset.
Phoenix - AwardBIOS CMOS Setup Utility
Advanced Chipset Features
DRAM Timing Selectable By SPD ITEM HELP
CAS Latency Time 2.5 Menu Level
DRAM RAS# to CAS# Delay 3
DRAM RAS# Precharge
Precharge dealy (tRAS)
3
8
System Memory Frequency
SLP_S4# Assertion Width
400MHz
1 to 2 Sec.
System BIOS Cacheable Enabled
Video BIOS Cacheable
Memory Hole At 15M-16M
Enabled
Disabled
PCI Express Root Port Func Press Enter
** VGA Setting **
PEG/Onchip VGA Control
On-Chip Video Memory Size
On-Chip Frame Buffer Size
FIXED Memory Size
Auto
Press Enter
8MB
0MB
DVMT Memory Size 120MB
Phoenix - AwardBIOS CMOS Setup Utility
PCI Express Root Port Func
PCI Express Port 1 Auto ITEM HELP
PCI Express Port 2 Auto Menu Level
PCI Express Port 3 Auto
PCI Express Port 4 Auto
PCI-E Compliancy Mode V1.0a
DRAM Timing Selectable
This option refers to the method by which the DRAM timing is selected.
The default is By SPD.
CAS Latency Time
You can select CAS latency time in HCLKs of 2/2 or 3/3. The system
board designer should set the values in this field, depending on the
DRAM installed. Do not change the values in this field unless you
change specifications of the installed DRAM or the installed CPU. The
choices are 2 and 3.