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AT INTERFACE DESCRIPTION
5 – 8
t
DH
t
DS
t
DVH
HSTROBE
at host
DD(15:0)
at host
HSTROBE
at device
DD(15:0)
at device
t
DVH
t
CYC
t
CYC
t
DVS
t
DVS
t
DS
t
DH
t
2CYC
t
DH
t
DVH
t
2CYC
DMARQ
(device)
DMACK-
(
host
)
STOP
(host)
DDMARDY-
(device)
HSTROBE
(host)
DD(15:0)
(host)
DA0, DA1, DA2,
CS0-, CS1-
t
UI
t
ACK
t
ENV
t
ZIORDY
t
LI
t
DVS
t
DVH
t
ACK
t
ACK
t
UI
Figure 5 - 9
Initiating an Ultra DMA Data Out Burst
Figure 5 - 10
Sustained Ultra DMA Data Out Burst