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Chapter 3 Hardware Overview
© National Instruments Corporation 3-3 IMAQ PCI/PXI-1411 User Manual
SDRAM
The PCI/PXI-1411 comes with 16 MB of onboard high-speed synchronous
dynamic RAM (SDRAM). The PCI/PXI-1411 can use the onboard RAM
as a first-in first-out (FIFO) buffer, transferring the image data as it is
acquired or acquiring the image data into SDRAM and holding it for later
transfer to main memory.
Trigger Control and Mapping Circuitry
The trigger control monitors and drives the external trigger line. You can
configure this line to start an acquisition on a rising or falling edge and
drive the line asserted or unasserted, similar to a digital I/O line. You can
also map many of the PCI/PXI-1411 status signals to this trigger line and
program the trigger line in polarity and direction. For a list of mappable
status signals, see Chapter 3, Programming with NI-IMAQ, of the
NI-IMAQ User Manual.
Acquisition, Scaling, ROI
The acquisition, scaling, and region-of-interest (ROI) circuitry monitors
the incoming video signals and routes the active pixels to the SDRAM
memory. The PCI/PXI-1411 can perform ROI and scaling on all video lines
and frames. Pixel and line scaling transfers certain multiples (two, four, or
eight) of pixels and lines to onboard memory. In an ROI acquisition, you
select an area within the acquisition window to transfer to the PCI bus.
Scatter-Gather DMA Controllers
The PCI/PXI-1411 uses three independent onboard direct memory
access (DMA) controllers. The DMA controllers transfer data between
the onboard SDRAM memory buffers and the PCI bus. Each of these
controllers supports scatter-gather DMA, which allows the DMA controller
to reconfigure on-the-fly. Thus, the PCI/PXI-1411 can perform continuous
image transfers directly to either contiguous or fragmented memory
buffers.