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CHAPTER 5 CPU ARCHITECTURE
Figure 5-5. Memory Map (
µ
PD78055, 78055Y)
0000H
Data memory
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General Registers
32 × 8 bits
Internal ROM
40960 × 8 bits
9FFFH
1000H
0FFFH
0800H
07FFH
0080H
007FH
0040H
003FH
0000H
CALLF Entry Area
CALLT Table Area
Vector Table Area
Program Area
Program Area
Internal Buffer RAM
32 × 8 bits
External Memory
23168 × 8 bits
Reserved
Program
memory
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A000H
9FFFH
FA80H
FA7FH
FAC0H
FABFH
FAE0H
FADFH
FEE0H
FEDFH
FF00H
FEFFH
FFFFH
Internal High-speed RAM
1024 × 8 bits
Special Function
Registers (SFRs)
256 × 8 bits
Reserved
FB00H
FAFFH