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Configuring 3-Way SLI
NVIDIA Corporation
October 17, 2007 | DU-03597-001_v01 107
POST Codes
Award, 87
NVMM, 94
power button cable, 17
Power Management Setup menu, 58
power supply requirement, ix
Power-on by alarm function, 59
power-on function, 60
Primary Master/Slave PIO, 55
Primary Master/Slave UDMA, 55
PWR1 connector, 13
PWR1 pin assignments, 13
PWR2 connector, 14
PWRLED, 17
PWRSW, 17
Quick Power On Self Test, 38
R to W Turnaround, 75
RAID Config menu, 56
RAS to CAS access, 75
RAS to RAS Delay, 75
Read-to-Read time, 75
Ref Clock, SPP1 MCP, 42
Refresh Rate, 75
removable device startup priority, 37
RESET, 17
Reset switch cable, 17
Row Address Strobe, 74
Row Cycle Time, 75
safety instructions, 7
SATA Signal Cable, 4
SATA Spread Spectrum, 43
Scalable Link Interface, 97
Security Options, 39
Serial ATA II connector, 16
Serial-ATA Controller, 55
How to, 41
Soft-Off by PBNT, 59
software installation instructions, 67
Spread Spectrum, 43
Standard CMOS Features menu, 31
System Clocks menu, 41
System Monitor menu, 64
system voltages and timing settings,
53
System Voltages menu, 50
tCL, 47, 76
tCPC, 76
TLP payload size, 63
Total Memory, 35
tRAS, 47, 74
tRC, 47
tRDC, 47
tRDRD, 75
tREF, 47