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M306NKT-EPB User’s Manual 4. Hardware Specifications
REJ10J0519-0200 Rev.2.00 Oct. 16, 2006 Page 78 of 104
Read timing
Write timing
BCLK
CSi
ADi
BHE
ALE
RD
DBi
td(BCLK-CS)
th(BCLK-CS)
tcyc
td(BCLK-AD)
th(BCLK-AD)
th(RD-CS)
td(BCLK-ALE)
th(BCLK-ALE)
th(RD-AD)
td(BCLK-RD)
th(BCLK-RD)
tac2(RD-DB)
Hi-Z
tsu(DB-RD)
th(RD-DB)
BCLK
CSi
ADi
BHE
ALE
WR,
WRL, WRH
DBi
td(BCLK-CS)
th(BCLK-CS)
tcyc
td(BCLK-AD)
td(BCLK-ALE)
th(BCLK-ALE)
th(WR-AD)
td(BCLK-WR)
th(BCLK-WR)
td(BCLK-DB)
Hi-Z
td(DB-WR)
th(BCLK-AD)
th(WR-CS)
th(WR-DB)
th(BCLK-DB)
Figure 4.4 Memory expansion mode and microprocessor mode (3 wait, accessing external area)