Filter
Top Products
28 Lyrion CE-ATA Product Manual, Rev. A
4.2.3 Status and Control Registers
The Status and Control Registers (SCR) start at MMC register address 80h and can be accessed only by using
CMD60 (RW_MULTIPLE_REGISTER) to read or write to them. The following SCR have been defined (RO =
The register may be read only, RW = The register may be read or written to).
The detailed description of each registers is as follows:
Table 12: Status and Control Registers
Index Byte Address Name R/W Description
0 80h scrTempC RO Current temperature reading
1 84h scrTempMaxP RO Peak maximum temperature reading
2 88h scrTempMinP RO Peak minimum temperature reading
6 98h scrCapabilites RO Capabilities and features of the drive
16 C0h scrControl RW Control capabilities of the drive
Byte
Address
Name Detailed description
80h scrTempC Bit 31 : Set to 1 (This register is supported)
Bit 30 : If set to 1, indicates the values in bits 29-0 are valid
If cleared to 0, indicates the values in bits 29-0 are invalid
Bits 29-16 : Reserved (0)
Bits 15-0 : Two's complement value of the number of degrees Celsius
84h scrTempMaxP Bit 31 : Set to 1 (This register is supported)
Bit 30 : If set to 1, indicates the values in bits 29-0 are valid
If cleared to 0, indicates the values in bits 29-0 are invalid
Bits 29-16 : Reserved (0)
Bits 15-0 : Two's complement value of the number of degrees Celsius
88h scrTempMinP Bit 31 : Set to 1 (This register is supported)
Bit 30 : If set to 1, indicates the values in bits 29-0 are valid
If cleared to 0, indicates the values in bits 29-0 are invalid
Bits 29-16 : Reserved (0)
Bits 15-0 : Two's complement value of the number of degrees Celsius
98h scrCapabilites Bit 31 : Set to 1 (This register is supported)
Bit 30 : If set to 1, indicates the values in bits 29-0 are valid
If cleared to 0, indicates the values in bits 29-0 are invalid
Bits 29-3 : Reserved (0)
Bit 2 : Cleared to 0 (MMC data block size of 4KB is not supported)
Bit 1 : Cleared to 0 (MMC data block size of 1KB is not supported)
Bit 0 : Set to 1 (MMC data block size of 512 bytes is supported)
C0h scrControl Bit 31 : Set to 1 (This register is supported)
Bit 30 : If set to 1, indicates the values in bits 29-0 are valid
If cleared to 0, indicates the values in bits 29-0 are invalid
Bits 29-2 : Reserved (0)
Bits 1-0 : 00b (Default value, MMC data block size is 512 bytes)