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ARM720T_LH79520 – Sharp LH79520 SoC with ARM720T 32-bit RISC Processor
Figure 12. Wiring the OpenBus System-based ARM720T_LH79520 to the physical pins of the FPGA device.
For more information on the concepts and workings of the OpenBus System, refer to the article AR0144 Streamlining
Processor-based FPGA design with the OpenBus System
.
Facilitating Communications
The host computer is connected to the ARM720T_LH79520 using the IEEE 1149.1 (JTAG) standard interface. You must ensure
that the physical JTAG lines are appropriately routed between the physical devices on your board.
Verification that the JTAG signals are indeed propagating through the intended physical devices as required is obtained by the
respective physical devices appearing on the Hard Devices chain within the
Devices view (View » Devices View). Figure 13
illustrates this for a board containing a Sharp LH79520 and a Xilinx Spartan 3 FPGA (XC321000-4FG456C).
Figure 13. Detected physical devices appearing in the Hard Devices JTAG chain.
22 CR0162 (v2.0) March 10, 2008