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USB 2.0 High-Speed 2-Port Hub Controller
Datasheet
Revision 1.92 (11-28-07) 11 SMSC USB2512
DATASHEET
0 1 Configured as an SMBus slave for external download of user-defined
descriptors.
SMBus slave address 58 (0101100x)
Strap Options Disabled
All Settings Controlled by Registers
1 0 Internal Default Configuration
Strap Options Enabled
Bus Power Operation
1 1 2-Wire I2C EEPROMS are supported.
Strap Options Disabled
All Settings Controlled by Registers
Table 3.3 USB2512 Power, Ground, and No Connect
PACKAGE SYMBOL 36-QFN EMB
FUNCTION
VDD18 14
VDD Core
This pin must have a 1.0μF (or greater) ±20% (ESR <0.1Ω) capacitor to
VSS.
VDD33PLL 36
VDD 3.3 PLL Regulator Reference
+3.3V power supply for the PLL. If the internal PLL 1.8V regulator
is enabled, then this pin acts as the regulator input.
VDDPLL18 34 VDD PLL
This pin must have a 1.0μF (or greater) ±20% (ESR <0.1Ω) capacitor to
VSS.
VDDA33 5
10
29
VDD Analog I/O
+3.3V Filtered analog PHY power, shared between adjacent ports.
VDD33/VDD33CR 23
15
VDDIO/VDD 3.3 Core Regulator Reference
+3.3V power supply for the Digital I/O
If the internal core regulator is enabled, then VDD33CR acts as the
regulator input.
NC 6
7
8
9
18
19
20
21
No Connect
Leave unconnected on the circuit board.
Table 3.2 SMBus or EEPROM Interface Behavior (continued)
CFG_SEL1 CFG_SEL0 SMBUS OR EEPROM INTERFACE BEHAVIOR