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High Speed Inter-Chip USB 2.0 Hub and Flash Media Controller
Datasheet
Revision 1.0 (06-01-09) 12 SMSC USB4640/USB4640i
DATASHEET
Chapter 4 Block Diagram
Figure 4.1 USB4640/USB4640i Block Diagram
1.2 V
HSIC
HSIC
Data & Strobe
Repeater
Controller
Serial
Interface
Engine
Serial
Interface
Routing & Port Re-Ordering Logic
Port Controller
PHY
Port #3
OC
Sense
Switch
Driver
Transaction
Translator
PHY
Port #2
OC
Sense
Switch
Driver
USB Data
Downstream
OC Sense/
Pwr Switch
8051
PROCESSOR
SFR
RAM
XDATA BRIDGE
+ BUS ARBITER
ROM
64 K
RAM
6 K
ADDR
MAP
GPIOs
Program Memory I/O Bus
PWR_FET0
8 pins
GPIO10 (CRD_PWR)
GPIO
3 K
total
RAM
EP2 TX
EP2 RX
BUS
INTFC
EP2 RX
EP0 TX
EP0 RX
SIE
CTL
BRIDGE
BUS
INTFC
FMDU
CTL
AUTO_CBW
PROC
FMI
BUS
INTFC
USB Data
Downstream
Flash Media Cards
(require Combo socket)
MS
xD*
SD/
MMC/
SDIO
OC Sense/
Pwr Switch
SPI
SPI (4 pins)
3.3 V
1.8 V
PLL
24 MHz
Crystal
1.8 V Reg
*For xD-Picture Card
TM
support, please obtain a user
license from the xD-Picture Card License office.
3.3 V
1.8 V Reg
VDDCR
HSIC
Impedance