Sun Microsystems F815D/V Personal Computer User Manual


 
Award BIOS Setup
41
SDRAM RAS-to-CAS Delay:
You can select RAS to CAS Delay time in HCLKs of 2/2 or 3/3.
The system board designer should set the values in this field, depending on
the DRAM installed. Do not change the values in this field unless you
change specifications of the installed DRAM or the installed CPU.
The choice: 2, 3 and Auto.
SDRAM RAS Precharge Time:
If an insufficient number of cycles are allowed for the RAS to accumulate its
charge before DRAM refresh, the refresh may be incomplete and the DRAM
may fail to retain data. Fast gives faster performance; and Slow gives more
stable performance. This field applies only when synchronous DRAM is
installed in the system.
The choice: 2, 3 and Auto.
System BIOS Cacheable:
Selecting “Enabled” allows caching of the system BIOS ROM at
F0000h-FFFFFh, resulting in better system performance. However, if any
program writes to this memory area, a system error may result.
The choice: Enabled, Disabled.
Video BIOS Cacheable:
Select “Enabled” allows caching of the video BIOS, resulting in better
system performance. However, if any program writes to this memory area, a
system error may result.
The choice: Enabled, Disabled.
Memory Hole At 15M-16M:
You can reserve this area of system memory for ISA adapter ROM. When
this area is reserved, it cannot be cached. The user information of
peripherals that need to use this area of system memory usually discusses
their memory requirements.
The choice: Enabled, Disabled.
CPU Latency Timer:
When enabled this item, the CPU cycle will only be deferred after it has been
held in a “Snoop Stall” for 31 clocks and another ADS# has arrived. When
disabled, the CPU cycle will be deferred immediately after the GMCH
receives another ADS#.
The choice: Enabled, Disabled.