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Chapter 9 Signal and Power-Up Requirements 43
26237C—May 2003 AMD Athlon™ XP Processor Model 10 Data Sheet
Preliminary Information
9 Signal and Power-Up Requirements
The AMD Athlon™ XP processor model 10 is designed to
provide functional operation if the voltage and temperature
parameters are within the limits of normal operating ranges.
9.1 Power-Up Requirements
Signal Sequence and
Timing Description
Figure 13 shows the relationship between key signals in the
system during a power-up sequence. This figure details the
requirements of the processor.
Figure 13. Signal Relationship Requirements During Power-Up Sequence
Notes: 1. Figure 13 represents several signals generically by using names not necessarily consistent
with any pin lists or schematics.
2.
Requirements 1–8 in Figure 13 are described in “Power-Up Timing Requirements” on page 44.
3.3 V Supply
VCCA (2.5 V)
(for PLL)
RESET#
V
CC_CORE
NB_RESET#
PWROK
System Clock
2
1
3
4
5
6
FID[3:0]
7
8
Warm reset
condition