AMD D900K Laptop User Manual


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Schematic Diagrams
NB K8T890-3 VLINK & VGA B - 11
B.Schematic Diagrams
NB K8T890-3 VLINK & VGA
Sheet 10 of 40
NB K8T890-3
VLINK & VGA
C642 0.1UF
C654 0.1UF
C987
0.1UF
R140 1K
1 2
+
C220 470UF/2.5V
T
C986
0.1UF
T
T
T
T
L42
FCM2012V-121
R154 0(R)
R553
1K_1%
R552
3K_1%
T
C730
0.1UF
T
C666 0.1UF
C221
0.1UF
T
C799 10UF
C657 0.1UF
T
T
C698 0.1UF
T
T
C692 0.1UF
T
L41
FCM2012V-121
C655 0.1UF
VD0
P34
VD1
R34
VD2
M33
VD3
L32
VD4
T32
VD5
R32
VD6
K33
VD7
L34
VD8
T33
VD9
U32
VD10
K32
VD11
J32
VD12
U34
VD13
V33
VD14
J34
VD15
J33
UPSTB+
M32
UPSTB-
N32
DNSTB+
N34
DNSTB-
N33
UPCMD
K34
DNCMD
M34
VBE#
R33
VPAR
T34
VLCOMPP
V34
VLVREF
P32
HCLK+
B25
HCLK-
A25
NC/VCCA33GCK
AJ11
NC/GNDAGCK
AK11
VSUS15
H34
VCCA33HCK/NC
D25
GNDAHCK/NC
E25
NC/VCCA33HCK
AC5
NC/GNDAHCK
AC6
VCLK
C28
VCCA33VCK/NC
D28
GNDAVCK/NC
E28
CONFIG3
AN2
ENVDD
AP1
ENBLT
AN1
VCCA33PLL1
AC1
GNDAPLL1
AC2
VCCA33PLL2
AC3
GNDAPLL2
AC4
VCCA33PLL3
AD1
GNDAPLL3
AD2
VCCA33DAC1
AE2
GNDADAC1
AE3
VCCA33DAC2
AD3
GNDADAC2
AD4
GNDADAC3
AE4
HSYNC
AG1
VSYNC
AG2
RSET
AF3
BISTIN
AG3
INTA#
AJ2
GPO0
AJ3
GPOUT
AH3
CONFIG2
AM4
SPD2
AH2
CONFIG1
AM3
SPCLK2
AH1
XIN
AJ1
PWROK
G32
RESET#
H32
SUSST#
G33
BUSY#
E34
TESTIN#
E32
DFTIN#
F32
TCLK
D34
TCLK600
B28
DEBUG
A28
RSVD0
A26
RSVD1
B26
RSVD2
C26
RSVD3
D26
RSVD4
E26
RSVD5
A27
RSVD6
C27
RSVD7
D27
AR
AF2
AG
AF1
AB
AE1
TVCLK/DVP0CLK
AM2
TVVS/DVP0VS
AM1
TVHS/DVP0HS
AL3
TVD0/DVP0D0
AH4
TVD1/DVP0D1
AJ4
TVD2/DVP0D2
AK3
TVD3/DVP0D3
AK2
TVD4/DVP0D4
AK1
TVD5/DVP0D5
AK4
TVD6/DVP0D6
AL1
TVD7/DVP0D7
AL2
TVD8/DVP0D8
AH5
TVD9/DVP0D9
AH6
TVD10/DVP0D10
AJ5
TVD11/DVP0D11
AJ6
TVCLKR/DVP0DET
AK5
TVDE/DVP0DE
AL4
VCC33GFX
AD5
VCC33GFX
AD6
VCC33GFX
AA11
VCC33GFX
AB11
VCC33GFX
AC11
VCC33GFX
AD11
VCC33GFX
AE5
VCC33GFX
AE6
VCC33GFX
AF4
VCC33GFX
AF5
VCC33GFX
AF6
VCC33GFX
AG4
VCC33GFX
AG5
VCC33GFX
AG6
VCC15VL
A30
VCC15VL
A31
VCC15VL
A32
VCC15VL
A33
VCC15VL
A34
VCC15VL
B30
VCC15VL
B31
VCC15VL
B32
VCC15VL
B33
VCC15VL
B34
VCC15VL
C30
VCC15VL
C31
VCC15VL
C32
VCC15VL
C33
VCC15VL
C34
VCC15VL
D30
VCC15VL
D31
VCC15VL
D32
VCC15VL
D33
VCC15VL
E30
VCC15VL
E31
VCC15VL
F30
VCC15VL
F31
VCC15VL
G30
VCC15VL
G31
VCC15VL
H30
VCC15VL
H31
VCC15VL
J30
VCC15VL
J31
VCC15VL
K30
VCC15VL
K31
VCC15VL
L21
VCC15VL
L22
VCC15VL
L23
VCC15VL
L24
VCC15VL
L30
VCC15VL
L31
VCC15VL
M24
VCC15VL
M29
VCC15VL
M30
VCC15VL
M31
VCC15VL
N24
VCC15VL
N29
VCC15VL
N30
VCC15VL
N31
VCC15VL
P24
VCC15VL
P29
VCC15VL
P30
VCC15VL
P31
VCC15VL
R24
VCC15VL
R29
VCC15VL
R30
VCC15VL
R31
VCC15VL
T24
VCC15VL
T29
VCC15VL
T30
VCC15VL
T31
VCC15VL
U24
VCC15VL
U29
VCC15VL
U30
VCC15VL
U31
VCC15VL
V24
VCC15VL
V29
VCC15VL
V30
VCC15VL
V31
U6C
K8T890
T
T
C675 0.1UF
T
T
R141 1K
T
R469 4.7K
C706
10UF
T
T
L40
FCM2012V-121
T
T
C763
10UF
GND
A11
GND
B12
GND
B14
GND
B16
GND
B18
GND
B20
GND
B27
GND
C25
GND
D13
GND
D15
GND
D17
GND
D19
GND
E27
GND
E33
GND
F14
GND
F15
GND
F19
GND
F20
GND
H2
GND
H33
GND
J2
GND
K4
GND
L2
GND
L33
GND
M4
GND
M6
GND
M12
GND
M13
GND
M14
GND
M15
GND
M16
GND
M17
GND
M18
GND
M19
GND
M20
GND
M21
GND
N2
GND
N6
GND
M22
GND
M23
GND
N13
GND
N14
GND
N15
GND
N16
GND
N17
GND
N18
GND
N19
GND
N20
GND
N21
GND
N22
GND
N12
GND
P33
GND
R2
GND
N23
GND
P4
GND
P12
GND
P13
GND
P14
GND
P15
GND
P16
GND
P17
GND
P18
GND
P19
GND
P20
GND
P21
GND
P22
GND
P23
GND
T4
GND
T6
GND
R12
GND
R13
GND
R14
GND
R15
GND
R16
GND
R17
GND
R18
GND
R19
GND
R20
GND
R21
GND
R22
GND
R23
GND
T12
GND
T13
GND
T14
GND
T15
GND
T16
GND
T17
GND
T18
GND
T19
GND
T20
GND
T21
GND
T22
GND
T23
GND
U2
GND
U6
GND
U12
GND
U13
GND
U14
GND
U15
GND
U16
GND
U17
GND
U18
GND
U19
GND
U20
GND
U21
GND
U22
GND
U23
GND
U33
GND
V4
GND
V12
GND
V13
GND
V14
GND
V15
GND
V16
GND
V17
GND
V18
GND
V19
GND
V20
GND
V21
GND
V22
GND
V23
GND
V32
GND
W2
GND
W12
GND
W13
GND
W14
GND
W15
GND
W16
GND
W17
GND
W18
GND
W19
GND
W20
GND
W21
GND
W22
GND
W23
GND
Y12
GND
Y13
GND
Y14
GND
Y15
GND
Y16
GND
Y17
GND
Y18
GND
Y19
GND
Y20
GND
Y21
GND
Y22
GND
Y23
GND
Y32
GND
AA12
GND
AA13
GND
AA15
GND
AA14
GND
AA16
GND
AA17
GND
AA18
GND
AA19
GND
AA20
GND
AA21
GND
AA22
GND
AA23
GND
AA34
GND
AB1
GND
AB2
GND
AB3
GND
AB4
GND
AB5
GND
AB6
GND
AB12
GND
AB13
GND
AB14
GND
AB15
GND
AB16
GND
AB17
GND
AB18
GND
AB19
GND
AB20
GND
AB21
GND
AB22
GND
AB23
GND
AB32
GND
AC12
GND
AC13
GND
AC14
GND
AC15
GND
AC16
GND
AG34
GND
AJ28
GND
AL29
GND
AL30
GND
AJ25
U6F
K8T890
C705
0.1UF
T
T
T
T
T
T
C676 0.1UF
C800 10UF
T
C762 0.1UF
C729
0.1UF
R467 1K(R)
R163 4.7K
C728 0.1UF
DEBUG
T
T
T
T
TCLK600
T
C761
0.1UF
C702 0.1UF
R155 0
R162 4.7K
T
T
T
T
R156 60_1%
T
T
T
T
T
T
R468 4.7K
T
C627 0.1UF
+3VS
+3.3VHCK
+1.5VS
+3.3VCK
+3.3VCK
+3VS
+3.3VHCK
+1.5VS
+2.5V
+2.5V
+1.5V
+2.5V
+1.5VS
+1.5V
+1.5VS
+3VS
+1.5VS
VLAD[0..15] (13)VLAD[0..15](13)
RESET_NB#(11)
DNSTB+(13)
UPSTB-(13)
UPSTB+(13)
DNCMD(13)
UPCMD(13)
DNSTB-(13)
HCLK# (2)
HCLK (2)
VPAR(13)
VBE#(13)
SUS_ST#(12,24)
ALL_PWRGD(2,3,11,13,31)
VCLK_NB(2)
+2.5V(3,8,11,34)
PWROK_NB#(12)
AGPBZ# (13)
+1.5VS(34)
+3VS(2,8,9,11,12,13,14,15,16,19,20,21,22,24,25,27,29,31,32,33)
+1.5V(9,33)
DNSTB-
DNSTB+
VCLK_NB
NEAR K8T890
VLAD[0..15]
LCOMPP
FPD5
FPD9
FPD7
FPD2
FPD8
FPD10
FPD4
FPD0
FPD11
FPD5
FPD3
FPD1
FPD9
FPD6
TCLK600
FPHS
LVREF_NB
FPVS
FPD5 => Dedicated DVI port configuration
GFX power up strapping setting:
0: TMDS
TESTIN#
RESET_NB#
AGPBZ#
SUS_ST#
DFTIN#
D03
LVREF_NB = 0.625V when R123 =1K 1% Ohm
DEBUG
1: TV Encoder
FPDEN
FPDET
DNCMD
UPSTB-
UPCMD
UPSTB+
VLAD[0..15]
VPAR
VBE#
DNSTB-
LCOMPP
LVREF_NB
DNSTB+
VLAD11
VLAD12
VLAD9
VLAD15
VLAD14
VLAD6
VLAD3
VLAD4
VLAD13
VLAD8
VLAD10
VLAD1
VLAD7
VLAD5
VLAD2
VLAD0 HCLK
HCLK#
SPACE 15 mil
TESTIN#
20 mil
DFTIN#
FPCLK
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