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ADSST-SALEM-3T
Rev. 0 | Page 12 of 24
SPECIFICATIONS—ADSST-73360LAR
(AVDD = 2.7 V to 3.6 V, DVDD = 2.7 V to 3.6 V, DGND = AGND = 0 V, f
MCLK
= 16.384 MHz, f
SCLK
= 8.192 MHz, f
S
= 8 kHz, T
A
= T
MIN
to
T
MAX
1
, unless otherwise noted.)
Table 6.
Parameter Min Typ Max Unit Test Conditions
REFERENCE
REFCAP
Absolute Voltage, V
REFCAP
1.08 1.2 1.32 V
REFCAP TC 50 ppm/°C
0.1 µF Capacitor Required from REFCAP to AGND2
REFOUT
Typical Output Impedance 130 Ω
Absolute Voltage, V
REFOUT
1.08 1.2 1.32 V Unloaded
Minimum Load Resistance 1 kΩ
Maximum Load Capacitance 100 pF
ADC SPECIFICATIONS
Maximum Input Range at VIN
2, 3
1.578 V p-p Measured Differentially
–2.85 dBm
Nominal Reference Level at VIN
(0 dBm0)
1.0954 V p-p Measured Differentially
–6.02 dBm
Absolute Gain
PGA = 0 dB –1.3 +0.6 dB 1.0 kHz
PGA = 38 dB
–0.8
+0.8 dB 1.0 kHz
Signal to (Noise + Distortion)
PGA = 0 dB 76 dB 0 Hz to 4 kHz; f
S
= 8 kHz
PGA = 0 dB 71 76 dB 0 Hz to 2 kHz; f
S
= 8 kHz
f
IN
= 60 kHz
PGA = 38 dB 58 dB 0 Hz to 4 kHz; f
S
= 64 kHz
Total Harmonic Distortion
PGA = 0 dB –80 –71 dB 0 Hz to 2 kHz; f
S
= 8 kHz; f
IN
= 60 kHz
PGA = 38 dB –64 dB 0 Hz to 2 kHz; f
S
= 64 kHz; f
IN
= 60 kHz
Intermodulation Distortion –78 dB PGA = 0 dB
Idle Channel Noise –68 dB PGA = 0 dB, f
S
= 64 kHz; SCLK
= 16 MHz
Crosstalk ADC-to-ADC –95 dB ADC1 at Idle; ADC2 to ADC6 Input Signal: 60 Hz
DC Offset –30 +30 mV PGA = 0 dB
Power Supply Rejection –55 dB
Input Signal Level at AVDD and DVDD Pins
1.0 kHz, 100 mV p-p Sine Wave
Group Delay
4, 5
25
µs
64 kHz Output Sample Rate
50
µs
32 kHz Output Sample Rate
95
µs
16 kHz Output Sample Rate
190
µs
8 kHz Output Sample Rate
Input Resistance at VIN
2, 4
25 kΩ
6
DMCLK = 16.384 MHz
Phase Mismatch 0.15 Degrees f
IN
=
1 kHz
0.01 Degrees f
IN
=
60 Hz