Cypress CY25818 Clock User Manual


 
CY25818/19
Document #: 38-07362 Rev. *B Page 4 of 7
Characteristics Curves
The following curves demonstrate the characteristic behavior
of the CY25818/19 when tested over a number of environ-
mental and application specific parameters. These are typical
performance curves and are not meant to replace any
parameter specified in Table 4 and Table 5.
Notes:
1. Single Power Supply: The voltage on any input or I/O pin cannot exceed the power pin during power-up.
2. Operation at any Absolute Maximum Rating is not implied.
Table 5. Timing Electrical Characteristics Vdd
= 3.3V ±10%, T
A
= 0°C to +70°C and C
L
= 15 pF (unless otherwise noted)
Parameter Description Conditions Min. Typ. Max. Unit
ICLKFR1 Input Frequency Range CY25818 8 16 MHz
ICLKFR2 Input Frequency Range CY25819 16 32 MHz
trise1 Clock Rise Time SSCLK and REFCLK, 0.4V to 2.4V 2.0 3.0 4.0 ns
tfall1 Clock Fall Time SSCLK and REFCLK, 0.4V to 2.4V 2.0 3.0 4.0 ns
CDCin Input Clock Duty Cycle X
IN
20 50 80 %
CDCout Output Clock Duty Cycle SSCLK and REFCLK @ 1.5V 45 50 55 %
CCJss Cycle-to-Cycle Jitter SSCLK; F
IN
= F
OUT
= 8–32 MHz 250 350 ps
CCJref Cycle-to-Cycle Jitter REFCLK; F
IN
= F
OUT
= 8–32 MHz 275 375 ps
200
210
220
230
240
250
260
270
280
290
300
8121620242832
Frequency (MHz)
CCJ (ps)
REFCLK CY25818
SSCLK CY25818
REFCLK CY25819
SSCLK CY25819
Figure 2. CCJ (ps) vs. Frequency (MHz)
1.75
2
2.25
2.5
2.75
-40 -25 -10 5 20 35 50 65 80 95 110 125
Temp (C)
BW %
12 MHz
32.0 MHz
Figure 3. Bandwidth% vs. Temperature
10
11
12
13
14
15
16
17
18
19
20
8 121620242832
Frequency (MHz)
IDD(mA
)
CY25819
16 - 32 MHz
CY25818
8 - 16 MHz
Figure 4. IDD (mA) vs. Frequency (MHz)
1.8
1.9
2
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
3
3.1
2.8 2.9 3 3.1 3.2 3.3 3.4 3.5 3.6 3.7
VDD (volts)
BW (%)
CY25819@32 MHz
CY25818@8.0 MHz
Figure 5. Bandwidth% vs. Vdd
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