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CY7C1302DV25
Document #: 38-05625 Rev. *A Page 16 of 18
Switching Waveforms
[25, 26, 27]
Notes:
25.Q00 refers to output from address A0. Q01 refers to output from the next internal burst address following A0 i.e., A0+1.
26.Outputs are disabled (High-Z) one clock cycle after a NOP.
27.In this example, if address A2=A1 then data Q20=D10 and Q21=D11. Write data is forwarded immediately as read results.This note applies to the whole diagram.
READ READ WRITE WRITEWRITE NOPREAD WRITE NOP
K
12345 8 1
0
6
7
K
RPS
W
PS
A
Q
D
C
C
A1
A0
D10
t
KH
t
KHKH
t
KHCH
t
CO
t
KL
t
CYC
tHC
t
SA
t
HA
t
HD
t
KHCH
DON’T CARE UNDEFINE
D
t
CLZ
t
CHZ
tSC
t
KH
t
KL
A2
A3 A4
A5 A6
t
HA
D11 D30 D31 D50 D51 D60 D61
t
SD
t
HD
Q00 Q21Q01 Q20 Q40 Q41
t
CO
t
DOH
t
DOH
t
KHKH
tCYC
9
t
SA
t
SD
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