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CY7C1380C
CY7C1382C
Document #: 38-05237 Rev. *D Page 14 of 36
READ Cycle, Continue Burst Next H X X L X H L H H L-H Tri-State
WRITE Cycle, Continue Burst Next X X X L H H L L X L-H D
WRITE Cycle, Continue Burst Next H X X L X H L L X L-H D
READ Cycle, Suspend Burst Current X X X L H H H H L L-H Q
READ Cycle, Suspend Burst Current X X X L H H H H H L-H Tri-State
READ Cycle, Suspend Burst Current H X X L X H H H L L-H Q
READ Cycle, Suspend Burst Current H X X L X H H H H L-H Tri-State
WRITE Cycle,Suspend Burst Current X X X L H H H L X L-H D
WRITE Cycle,Suspend Burst Current H X X L X H H L X L-H D
Notes:
3. X = “Don't Care.” H = Logic HIGH, L = Logic LOW.
4. WRITE
= L when any one or more Byte Write enable signals and BWE = L or GW= L. WRITE = H when all Byte write enable signals , BWE, GW = H.
5.
The DQ pins are controlled by the current cycle and the
OE
signal.
OE
is asynchronous and is not sampled with the clock.
6. CE
1
, CE
2
, and CE
3
are available only in the TQFP package. BGA package has only 2 chip selects CE
1
and CE
2
.
7. The SRAM always initiates a read cycle when ADSP
is asserted, regardless of the state of GW, BWE, or BW
X
. Writes may occur only on subsequent clocks
after the
ADSP
or with the assertion of
ADSC
. As a result,
OE
must be driven HIGH prior to the start of the write cycle to allow the outputs to tri-state.
OE
is a
don't care for the remainder of the write cycle
8.
OE
is asynchronous and is not sampled with the clock rise. It is masked internally during write cycles. During a read cycle all data bits are Tri-State when
OE
is
inactive or when the device is deselected, and all data bits behave as output when
OE
is active (LOW)
.
Truth Table for Read/Write
[5]
Function (CY7C1380C)
GW BWE
BW
D
BW
C
BW
B
BW
A
Read HHXXXX
Read HLHHHH
Write Byte A – ( DQ
A
and DQP
A
) HLHHHL
Write Byte B – ( DQ
B
and DQP
B
)HLHHLH
Write Bytes B, A H L H H L L
Write Byte C – ( DQ
C
and DQP
C
) HLHLHH
Write Bytes C, A H L H L H L
Write Bytes C, B H L H L L H
Write Bytes C, B, A H L H L L L
Write Byte D – ( DQ
D
and DQP
D
) HLLHHH
Write Bytes D, A H L L H H L
Write Bytes D, B H L L H L H
Write Bytes D, B, A H L L H L L
Write Bytes D, C H L L L H H
Write Bytes D, C, A H L L L H L
Write Bytes D, C, B HLLLLH
Write All Bytes HLLLLL
Write All Bytes LXXXXX
Truth Table for Read/Write
[5]
Function (CY7C1382C)
GW
BWE
BW
B
BW
A
Read H H X X
Read H L H H
Write Byte A – ( DQ
A
and DQP
A
)HLHL
Write Byte B – ( DQ
B
and DQP
B
)HLLH
Write Bytes B, A H L L L
Write All Bytes H L L L
Write All Bytes L X X X
Truth Table
[ 3, 4, 5, 6, 7, 8]
Operation Add. Used
CE
1
CE
2
CE
3
ZZ ADSP ADSC ADV
WRITE
OE
CLK DQ
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