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CY8C20x36/46/66, CY8C20396
Document Number: 001-12696 Rev. *D Page 10 of 34
24-Pin QFN with USB Pinout
Table 4. Pin Definitions - CY8C20396 PSoC Device
[2, 3]
Pin No.
Type
Name Description
Digital Analog
1 IO I P2[5]
2 IO I P2[3]
3 IO I P2[1]
4 IOHR I P1[7] I2C SCL, SPI SS
5 IOHR I P1[5] I2C SDA, SPI MISO
6 IOHR I P1[3] SPI CLK
7 IOHR I P1[1] ISSP CLK, I2C SCL, SPI MOSI
8 Power VSS Ground
9 IO I D+ USB D+
10 IO I D- USB D-
11 Power VDD Supply
12 IOHR I P1[0] ISSP DATA, I2C SDA
13 IOHR I P1[2]
14 IOHR I P1[4] Optional external clock input
(EXTCLK)
15 IOHR I P1[6]
16 RESET INPUT XRES Active high external reset with
internal pull down
17 IOH I P0[0]
18 IOH I P0[2]
19 IOH I P0[4]
20 IOH I P0[6]
21 IOH I P0[7]
22 IOH I P0[5]
23 IOH I P0[3] Integrating input
24 IOH I P0[1] Integrating input
CP Power VSS Thermal pad must be
connected to Ground
LEGEND I = Input, O = Output, OH = 5 mA High Output Drive, R = Regulated Output
P0[7]
I2C SDA, SPI MISO, P1[5]
USB D-
QFN
(Top View)
I2C SCL, SPI SS, P1[7]
SPI CLK, P1[3]
1
2
3
4
5
6
18
17
16
15
14
13
P0[0]
XRES
24
23
22
21
20
19
P0[3]
P0[5]
P0[6]
P0[2]
7
8
9
10
11
12
ISSP CLK, I2C SCL, SPI MOSI, P1[1]
VDD
P2[1]
Vss
P1[2]
ISSP DATA, I2C SDA, P1[0]
P1[4], EXTCLK
P1[6]
P0[4]
P0[1], AI
USB D+
P2[5]
P2[3]
Figure 4. CY8C20396 PSoC Device
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