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Document #: 001-01638 Rev. *E Page 22 of 26
Busy Timing Diagram No.1 (CE Arbitration)
Busy Timing Diagram No.2 (Address Arbitration)
[54]
Note:
54.If t
PS
is violated, the busy signal will be asserted on one side or the other, but there is no guarantee to which side BUSY will be asserted.
Switching Waveforms (continued)
ADDRESS MATCH
t
PS
t
BLC
t
BHC
ADDRESS MATCH
t
PS
t
BLC
t
BHC
CE
R
Valid First
ADDRESS
L,R
BUSY
R
CE
L
CE
R
BUSY
L
CE
R
CE
L
ADDRESS
L,R
CE
L
Valid First
[54]
ADDRESS MATCH
t
PS
ADDRESS
L
BUSY
R
ADDRESS MISMATCH
t
RC
or t
WC
t
BLA
t
BHA
ADDRESS
R
ADDRESS MATCH ADDRESS MISMATCH
t
PS
ADDRESS
L
BUSY
L
t
RC
or t
WC
t
BLA
t
BHA
ADDRESS
R
Right Address Valid First
Left Address Valid First
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