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G586SP/G586SP AIO
58
Ch0-Reserved for User
Ch1-Reserved for User
Ch2-Diskette
Ch3-Reserved for User
DMA Controller 1
DMA Controller 2
Ch4-Cascade for CTRL 1
Ch5-Reserved for User
Ch6-Reserved for User
Ch7-Reserved for User
Note:
DMA controller 1 supports 8-bit data transfer.
DMA controller 2 supports 16-bit data transfer.
Address Generation for DMA Channels 3 to 0
Source DMA Page Memory DMA Controller 1
Address A23 « A16 A15 « A0
Address Generation for DMA Channels 7 to 5
Source DMA Page Memory DMA Controller 2
Address A23 « A17 A16 « A1
v Appendix E: System Overview
DMA Channels