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Contents
C141-E050-02EN xi
CHAPTER 6 Operations................................................................................. 6-1
6.1 Device Response to the Reset 6-2
6.1.1 Response to power-on 6-2
6.1.2 Response to hardware reset 6-4
6.1.3 Response to software reset 6-5
6.1.4 Response to diagnostic command 6-6
6.2 Address Translation 6-7
6.2.1 Default parameters 6-7
6.2.2 Logical address 6-8
6.3 Power Save 6-9
6.3.1 Power save mode 6-9
6.3.2 Power commands 6-11
6.4 Defect Management 6-11
6.4.1 Spare area 6-12
6.4.2 Alternating defective sectors 6-12
6.5 Read-Ahead Cache 6-14
6.5.1 Data buffer configuration 6-14
6.5.2 Caching operation 6-14
6.5.3 Usage of read segment 6-16
6.5.3.1 Mis-hit (no hit) 6-16
6.5.3.2 Sequential read 6-17
6.5.3.3 Full hit (hit all) 6-20
6.5.3.4 Partially hit 6-21
6.6 Write Cache 6-22
Glossary ................................................................................................. GL-1
Acronyms and Abbreviations ........................................................................AB-1
Index ...................................................................................................IN-1