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The Pre-Arm Reading Count Registers base + 73
16
and base + 75
16
The pre-arm reading count registers are defined below.
Address 76543210
base + 73
16
base + 75
16
base + 73
16
= pre-arm reading count least significant byte
base + 75
16
= pre-arm reading count most significant byte
Register 73: Contains the least significant byte of the pre-arm reading count.
Register 75: Contains the most significant byte of the pre-arm reading
count.
Pre-Arm Reading Count Register power-On/Reset Settings
At power-on or following a reset, the digitizer is set for 0 pre-arm readings.
When the pre-arm reading mode is set (base +4B
16
bit 3 set to ’1’), the
digitizer is set for 3 pre-arm readings.
The Post-Arm Reading Count Registers base + 77
16
to base + 7B
16
The post-arm reading count registers are defined below.
Address 76543210
base + 77
16
base + 7B
16
base + 77
16
= post-arm reading count least significant byte
base + 79
16
= post-arm reading count middle significant byte
base + 7B
16
= post-arm reading count most significant byte
Register 77: Contains the least significant byte of the pos-arm reading
count.
Register 79: Contains the middle significant byte of the post-arm reading
count.
Register 7B: Contains the most significant byte of the post-arm reading
count.
Post-Arm Reading Count Register power-On/Reset Settings
At power-on or following a reset, the digitizer is set for 7 post-arm readings.
The digitizer is also set for 7 post-arm readings when the pre-arm reading
mode is set (base +4B
16
bit 3 set to ’1’).
362 Register Programming Appendix C