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Dynamic Oscillator Switchover
The z10 BC has two oscillator cards, a primary and a
backup. For most cases, should a failure occur on the pri-
mary oscillator card, the backup can detect it, switch over,
and provide the clock signal to the system transparently,
with no system outage. Previously, in the event of a failure
of the active oscillator, a system outage would occur, the
subsequent system Power On Reset (POR) would select
the backup, and the system would resume operation.
Dynamic Oscillator Switchover is exclusive to System z10
and System z9.
Transparent Sparing
The z10 BC offers 12 PUs, two are designated as System
Assist Processors (SAPs). In the event of processor failure,
if there are spare processor units available (undefi ned),
these PUs are used for transparent sparing.
Concurrent Memory Upgrade
Memory can be upgraded concurrently using LIC-CC
if physical memory is available on the machine either
through the Plan Ahead Memory feature or by having more
physical memory installed in the machine that has not
been activated.
Plan Ahead Memory
Future memory upgrades can now be preplanned to be
nondisruptive. The preplanned memory feature will add
the necessary physical memory required to support target
memory sizes. The granularity of physical memory in the
System z10 design is more closely associated with the
granularity of logical, entitled memory, leaving little room
for growth. If you anticipate an increase in memory require-
ments, a “target” logical memory size can now be speci-
fi ed in the confi guration tool along with a “starting” logical
memory size. The confi guration tool will then calculate the
physical memory required to satisfy this target memory.
Should additional physical memory be required, it will be
fulfi lled with the preplanned memory features.
The preplanned memory feature is offered in 4 gigabyte
(GB) increments. The quantity assigned by the confi gu-
ration tool is the number of 4 GB blocks necessary to
increase the physical memory from that required for the
“starting” logical memory to the physical memory required
for the “target” logical confi guration. Activation of any
preplanned memory requires the purchase of preplanned
memory activation features. One preplanned memory acti-
vation feature is required for each preplanned memory fea-
ture. You now have the fl exibility to activate memory to any
logical size offered between the starting and target size.
Service Enhancements
z10 BC service enhancements designed to avoid sched-
uled outages include:
• Concurrent fi rmware fi xes
• Concurrent driver upgrades
• Concurrent parts replacement
• Concurrent hardware upgrades
• DIMM FRU indicators
• Single processor core checkstop
• Single processor core sparing
• Rebalance PSIFB and I/O Fanouts
• Redundant 100 Mb Ethernet service network with VLAN
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