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4-2 21152 PCI-to-PCI Bridge Evaluation Board
User’s Guide
Secondary Bus Arbitration
Table 4-1 describes the operation of internal arbitration jumpers.
Figure 4-1. Arbitration Jumpers
21152
W1
W4
J1
J7
W5
W7
J2
J4
J5
J3
J13
J6
J12
J10
J11
J9
J8
W1, W4, J7
_
Secondary Bus
External/Internal Arbitration
Configurable Jumpers
E4
E3
Viewed from Side 1
E3
_
Socket for
Optional PAL to
Control Secondary
Bus External
Arbitration
LJ-05127.AI4
Table 4-1. Internal Arbitration Jumper Positions
Jumper Position Description
J7 Bottom Selects the 21152 as the source of secondary grant signals.
W4 Left
Selects the board signal sreq<0>_l (device 4 request signal) to drive the 21152
s_req_l<0> input.
W1 Left
Ties s_cfn_l low, which enables the 21152 internal arbiter. When the
secondary PCI bus is idle, parking is at the 21152.