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24 Specification Update
Intel
®
80219 General Purpose PCI Processor
Specification Changes
Specification Changes
1. Signal NC2 was renamed to P_BMI (AE23). New function added to signal
P_BMI.
The P_BMI (AE23) signal has been added to the Intel
®
80219 general purpose PCI processor. This
signal replaces, using an external GPIO pin for Initialization Device Select (IDSEL) control of an
I/O device during host configuration cycles.
Issue: I/O Device IDSEL control using the new P_BMI signal:
When the system boots after reset, the host BIOS initiates a PCI bus scan to find all the PCI
components installed in the system. The system uses the IDSEL signal to address the I/O device when
assigning the necessary resources. Without special control over the IDSEL signal during configuration
cycles, the host and the 80219 may both attempt to configure the same I/O device. By taking control of
IDSEL, the 80219 can execute configuration cycles to the slave I/O device (SCSI) and properly hide
the slave I/O device from the host and operating system initiated configuration cycles.
The 80219 has eight integrated General Purpose Input Output (GPIO) pins, referred to as GPIO[7:0].
These pins, along with the new PCI-X Bus Master Indicator (P_BMI) signal, can be used to control the
IDSEL to the I/O device. External circuitry is no longer required other than a simple switch. The output
function of the P_BMI signal is controlled by the GPIO Output Data Register (GPOD), Bit 0 as shown
in Table 1. The P_BMI signal is always driven and defaults to driving low at power up.
The IDSEL signal is used as a chip select during configuration cycles initiated by the BIOS, operating
system or 80219. The GPOD[0] can be driven low in firmware, thereby disabling the P_BMI signal
and hiding the host I/O device from the system, by turning off its IDSEL. When the 80219 intends to
perform configuration cycles in the PCI bus segment of the I/O device, the P_BMI signal should be
asserted high by driving the GPOD[0] high. The affect of these two operations is, that the I/O device
is initialized and controlled by the 80219. More care must be taken with the gate chosen to control
IDSEL, since most host bridge controllers do not use PCI address stepping. With IDSEL being a
synchronous signal, with respect to CLK, the switch used must be a sub nanosecond propagation
delay device (e.g., Pericom PI5C3303). In Figure 2, the P_BMI signal is used to control a
MUX/DeMUX switch that is used to enable/disable IDSEL to the I/O device.
Table 1. GPIO Output Data Register (address = FFFF E7CCh)
Bit Default Description
00
This bit value is driven on the P_BMI signal when the 80219 has been given control
of the bus (granted GNT#) by the bus arbiter.