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Turbo µPSD
10 MIPS Peak (6.4 Eff.)
Turbo µPSD
plus
plus
10 MIPS Peak (9.0 Eff.)
Effective MIPS
Competition: Flash Density & Effective MIPS*
Competition: Flash Density & Effective MIPS*
64K
128K
256K
512K
Main Flash
Density
(bytes)
µPSD
3.3 MIPS Peak (3.0 Eff.)
uPSD typically exceeds competition in one or more of: Flash, SRAM,
peripherals, or flexibility. And no other MCU has Flash PLD logic.
uPSD typically exceeds competition in one or more of: Flash, SRAM,
peripherals, or flexibility. And no other MCU has Flash PLD logic.
µ
µµ
µ
PSD3212 (Lite)
PSD3212 (Lite)
3.0
µ
µµ
µ
PSD3233/53
PSD3233/53
3.0
µ
µµ
µ
PSD3234/54
PSD3234/54
3.0
µ
µµ
µ
PSD3334/54
PSD3334/54
6.4
µ
µµ
µ
PSD3333
PSD3333
6.4
µ
µµ
µ
PSD3312 (Turbo Lite)
PSD3312 (Turbo Lite)
6.4
µ
µµ
µ
PSD3434/54
PSD3434/54
9.0
µ
µµ
µ
PSD3455
PSD3455
9.0
µ
µµ
µ
PSD3433
PSD3433
9.0
Philips
89C668
3.0
Winbond
W78E365
3.0
Philips/Atmel
89C51RD2
3.0
NEC
µPD780078
1.8
Winbond
W77E532
6.4
Hitachi
H8/3437
4.7
Winbond
W77E516
6.4
Dallas
DS80C320
5.3
Hitachi
(16-bit)
H8/3039F
5.2
Microchip
PIC18F6720
8.4
Atmel
ATmega128
13.4
Cygnal
8051F022
14.9
Cygnal (USB)
8051F320
14.9
Atmel
ATmega64
13.4
Microchip
PIC18F6620
8.4
Hitachi (16-bit)
HD8/3069F
7.2
Motorola (16-bit)
MC9S12DJ256B
5.8
Hitachi (16-bit)
H8/3022F
5.2
*
Effective MIPS based on typical mix of instructions using 1, 2, 3, and 4 or more MCU clock cycles at maximum clock frequency.