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Chapter 2 Hardware Overview
NI 5620 User Manual 2-6 ni.com
acquisition clock in a free-running state, in which the acquisition clock is
not synchronized to any external reference.
The voltage controlled crystal oscillator (VCXO) is a 64 MHz clock.
The trigger and clock routing area directs clock signals and triggers.
The TIO is the timing engine used for the NI 5620.
The MITE is the PXI bus interface. The MITE provides high-speed direct
memory access (DMA) transfers from the NI 5620 to the host computer’s
memory.
Other Features
This section contains information on other features on the NI 5620.
Multiple-Record Acquisitions
After the trigger has been received and the posttrigger samples have
been stored, you can configure the NI 5620 to begin another acquisition
that is stored in another memory record on the device. This process is a
multiple-record acquisition. To perform multiple-record acquisitions,
configure the NI 5620 to the number of records to be acquired before
starting the acquisition. The NI 5620 acquires an additional record each
time a trigger is accepted until all the requested records have been stored
in memory. After the initial setup, this process does not require software
intervention.
Between each record, there is a dead time during which the trigger is not
accepted. If the record length is greater than 80 µs, this dead time will be
500 ns. If, however, the record length is less than 80 µs, the dead time will
be 80 µs. During this time, the memory controller sets up for the next
record. There may also be additional dead time while the minimum number
of pretrigger samples are being acquired. Figure 2-4 shows a timing
diagram of a multiple-record acquisition.