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AR-M350U CIRCUIT DIAGRAM 9-8
B. Circuit Diagram
5
5
4
4
3
3
D
C
B
A
[DRAGON-D10][CPU TX4955]
SYSADC1
A_SYSCMD2
SYSADC1
SYSADC0
SYSADC3
SYSADC2
A_SYSCMD3
SYSADC[3:0]
A_SYSCMD8
SYSADC3
SYSADC2
A_SYSCMD0
A_SYSCMD5
A_SYSCMD1
A_SYSCMD7
A_SYSCMD6
A_SYSCMD4
SYSADC0
A_SYSAD11
A_SYSAD9
A_SYSAD0
A_SYSAD12
A_SYSAD6
A_SYSAD8
A_SYSAD14
A_SYSAD4
A_SYSAD10
A_SYSAD15
A_SYSAD3
A_SYSAD2
A_SYSAD13
A_SYSAD5
A_SYSAD7
A
SYS
A
D31
A_SYSAD1
RDY2
A_SYSAD[31:0]4
3_RELEASE2
3_VALIDIN2
JTMS3
VCCOK2
A_SYSCMD[8:0]4
JTDI3
JTRST3
CPUCLK21
3_VALIDOUT2
JTDO_A3
JTCLK3
3.3V
3.3V
3.3V
3.3V3.3V
R136
10
R126
10
R127
10
BR26
1
2
3
45
6
7
8
R100
4.7K
R137
10
R112
10K
R116 10
R118 10
R123
10K
R119
3.3K
C129
1000pF
C130
0.1uF
IC20
TMPR4955AF-200
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73 128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
VSS
BUFSEL1
JTDO
JTDI
JTCK
JTMS
VCCIO
VSS
SYSAD4
SYSAD5
VCCINT
VSS
SYSAD6
VCCIO
VSS
SYSAD7
SYSAD8
VCCINT
VSS
SYSAD9
VCCIO
VSS
SYSAD10
SYSAD11
VCCINT
VSS
SYSAD12
VCCIO
VSS
SYSAD13
SYSAD14
VCCINT
VSS
SYSAD15
BUFSEL0
PCST3
PCST2
PCST1
PCST0
VCCIO
VSS
TRST*
RDRDY*/(GND)
WRRDY*/(EOK*)
VALIDIN*/(EVALID*)
VALIDOUT*/(PVALID*)
RELEASE*/(PMASTER*)
VCCIO
PLLRESET*
VCCINT
TINTDIS
VSS
SYSCMD0
SYSCMD1
SYSCMD2
SYSCMD3
SYSCMD4
SYSCMD5/(GND)
VCCIO
VSS
SYSCMD6/(GND)
SYSCMD7/(GND)
SYSCMD8/(GND)
SYSCMDP/(GND)
VCCINT
VSS
VCCIO
HALT/DOZE
INT0*
INT1*
INT2*
INT3*
INT4*
Y AD31
SYSADC2/(GND)
VCCINT
VSS
SYSADC3/(GND)
VCCIO
VSS
SYSADC0/(GND)
VCCINT
VSS
SYSADC1/(GND)
SYSAD0
VCCIO
VSS
SYSAD1
SYSAD2
VCCINT
VSS
SYSAD3
PCST8
PCST7
PCST6
PCST5
PCST4
VCCIO
VSS
VCCIO
VSSPLL
PLLCAP
VCCPLL
VSS
MASTERCLOCK
VCCIO
R122
4.7K
+
C125
10uF/16V