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Small Footprint RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support
Datasheet
SMSC LAN8720/LAN8720i 29 Revision 1.0 (05-28-09)
DATASHEET
example, only a 25MHz clock can be used (clock cannot be 50MHz). Similar to the 25MHz crystal
mode, the nINT function is disabled.
The RMII REF_CLK is a continuous clock that provides the timing reference for CRS_DV, RXD[1:0],
TXEN, TXD[1:0] and RXER. The LAN8720 uses REF_CLK as the network clock such that no buffering
is required on the transmit data path. However, on the receive data path, the receiver recovers the
clock from the incoming data stream, and the LAN8720 uses elasticity buffering to accommodate for
differences between the recovered clock and the local REF_CLK.
4.8 Auto-negotiation
The purpose of the Auto-negotiation function is to automatically configure the transceiver to the
optimum link parameters based on the capabilities of its link partner. Auto-negotiation is a mechanism
for exchanging configuration information between two link-partners and automatically selecting the
highest performance mode of operation supported by both sides. Auto-negotiation is fully defined in
clause 28 of the IEEE 802.3 specification.
Once auto-negotiation has completed, information about the resolved link can be passed back to the
controller via the Serial Management Interface (SMI). The results of the negotiation process are
reflected in the Speed Indication bits in register 31, as well as the Link Partner Ability Register
(Register 5).
The auto-negotiation protocol is a purely physical layer activity and proceeds independently of the MAC
controller.
The advertised capabilities of the transceiver are stored in register 4 of the SMI registers. The default
advertised by the transceiver is determined by user-defined on-chip signal options.
The following blocks are activated during an Auto-negotiation session:
Auto-negotiation (digital)
Figure 4.6 LAN8720 Sources REF_CLK from External 25MHz Source
LAN8720
10/100 PHY
24-QFN
RMII
TXP
TXN
Mag RJ45
RXP
RXN
XTAL1/CLKIN
XTAL2
TXD[1:0]
2
RXD[1:0]
CRS_DV
2
RMII
LED[2:1]
2
Interface
MDIO
MDC
nRST
TXEN
REFCLKO
MAC
Capable of
accepting 50MHz
clock
nINT not available in this
configuration
RXER
25MHz
Clock
REF_CLK