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SME5224AUPA-400 400 MHz CPU, 4.0 MB E-Cache
UltraSPARC
™
-II CPU Module
July 1999
Sun Microsystems, Inc
CPU DESCRIPTION
UltraSPARC-II CPU
The UltraSPARC™-II CPU is the second generation in the UltraSPARC™ s-series microprocessor family.
A complete implementation of the SPARC V9 architecture, it has binary compatibility with all previous ver-
sions of the SPARC™ microprocessor family.
The UltraSPARC™-II CPU is designed as a cost effective, scalable and reliable solution for high-end worksta-
tions and servers. Meeting the demands of mission critical enterprise computing, theUltraSPARC™-II CPU
runs enterprise applications requiring high data throughput. It is characterized by a high integer and floating
point performance: optimally accelerating application performance, especially multimedia applications.
Delivering high memory bandwidth, media processing and raw compute performance, the UltraSPARC™-II
CPU incorporates innovative technologies which lower the cost of ownership.
CPU Features CPU Benefits
Architecture
• 64-bit SPARC-V9 architecture increases the
network computing application’s performance
•Thirty-two 64-bit integer registers • Allows applications to store data locally in the
register files
•Superscalar/Superpipelined • Allows for multiple integer and floating point
execution units leading to higher application
performance
•High performance memory interconnect • Alleviating the bottleneck of bandwidth to main
memory
•Built-in Multiprocessing Capability • Delivering scalability at the system level, thus
increasing the end user’s return on investment
•VIS multimedia accelerating instructions • Reducing the system cost by eliminating the
special purpose media processor
•100% binary compatibility with previous versions
of SPARC™
• Increasing the return on investment of software
applications
•Uses 0.25 micron technology and packaging • Enhanced processor performance with decreased
power consumption, thus increasing the reliability
of the microprocessor
Performance
•Integer • 17.4(SPECint95)
•Floating Point • 25.7 (SPECfp95)
•Bandwidth (BW) to main memory • 1.6 Gbyte/sec (peak) with a 100MHz UPA
Unique Features
•Block load and store instructions • Delivering high performance access to large
datasets across the network
•JTAG Boundary Scan and Performance
Instrumentation
• Enabling UltraSPARC™ based systems to offer
features such as: power management, automatic
error correction, and lower maintenance cost