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18
Th
e
Ult
ra
SPARC
T
2
P
rocessor w
ith
C
oo
lTh
rea
d
s
T
ec
h
no
l
ogy Sun Microsystems, Inc.
Power Management
Beyond the inherent efficiencies of CMT design, the UltraSPARC T2 is the first processor
to incorporate unique power management features at both the core and memory levels
of the processor. These features include reduced instruction rates, parking of idle
threads and cores, and ability to turn off clocks in both cores and memory to reduce
power consumption. Substantial innovation is present in the areas of:
• Limiting speculation such as conditional branches not taken
• Extensive clock gating in the data path, control blocks, and arrays
• Power throttling that allows extra stall cycles to be injected into the decode stage