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SUPER PIIIDM6/PIIIDM4/PIIIDM3/PIIIDME Manual
B-2
APPENDIX B
Check
Point Description
10 The keyboard controller command byte is written.
Next, issuing the pin 23 and 24 blocking and unblocking
commands.
11 Next, checking if the <End or <Ins> keys were pressed
during power on. Initializing CMOS RAM if the
Initialize CMOS RAM in every boot AMIBIOS POST
option was set in AMIBCP or the <End> key was
pressed.
12 Next, disabling DMA controllers 1 and 2 and interrupt
controllers 1 and 2.
13 The video display has been disabled. Port B has been
initialized. Next, initializing the chipset.
14 The 8254 timer test will begin next.
19 The 8254 timer test is over. Starting the memory refresh
test next.
1A The memory refresh test line is toggling. Checking the
15 second on/off time next.
23 Reading the 8042 input port and disabling the
MEGAKEY Green PC feature next. Making the
BIOS code segment writable and performing any
necessary configuration before initializing the interrupt
vectors.
24 The configuration required before interrupt vector
initialization has completed. Interrupt vector initialization
is done. Clearing the password if the POST DIAG
switch is on.
25 Interrupt vector initialization is done. Clearing the
password if the POST DIAG Switch is on.
27 Any initialization before setting video mode will be
done next.