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ADS5102/3 EVM Operational Procedure
1-4
3) Switch power supplies on.
4) Use a function generator with 50-Ω output to input a 40-MHz, 1.5-V offset,
3-V
(p-p)
amplitude square wave signal into J3 to be used as the ADC clock.
Note:
The frequency of the clock must be within the specification for the device
speed grade.
5) Use a function generator with 50-Ω output to input a 1.5-V offset, 3-V
(p-p)
amplitude square wave signal into J4 to be used as the buffered output
clock.
Note:
This signal must be the same frequency and synchronized with the ADC
clock.
6) Use a frequency generator with 50-Ω output to input a 1.5-MHz, 0-V offset,
0.4-V
(p-p)
amplitude sine wave signal into J2. This provides a transformer
coupled differential signal to the ADC.
7) The digital pattern on the output connector J15 now represents a sine
wave and can be monitored using a logic analyzer.