Texas Instruments ADS61xx Computer Hardware User Manual


 
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CircuitDescription
Table2.Jumpers
DescriptionReferenceDesignatorDefaultSelectionOptionalSelection
Parallelmode:SENpinJ15–6,Offsetbinary,CMOSoutputMultiplechoices
voltagebias
SENcontrolJ22–3,EVMcontrolled1–2,USBorFPGA
controlled
ADCcontrolmodeJ32–3,Parallelmode1–2,serialmode
Parallelmode:SCLKpinJ41–2,0-dBGain,IntRefMultiplechoices
voltagebias
ADS61xx/ADS61B23J51–2,ADS61xx/ADS61B23poweredon2–3,ADS61xx/ADS61B23
powerdownpoweredoff
SDATAcontrolJ61–2,USBorFPGAcontrolled2–3,EVMcontrolled
SCLKcontrolJ72–3,EVMcontrolled2–3,USBorFPGA
controlled
Table3.Surface-MountJumpers
DescriptionReferenceDesignatorDefaultSelectionOptionalSelection
JP1ProbepointforCDCP1803output
ClockinputpathselectionJP21–2,transformercoupledpath2–3,CDCP1803path
ClockinputpathselectionJP31–2,transformercoupledpath2–3,CDCP1803path
ClockinputpathselectionJP41–2,transformercoupledpath2–3,CDCP1803path
AnaloginputpathJP51–2,transformercoupledinputpath2–3,THS4509path
AnaloginputpathJP61–2,transformercoupledinputpath2–3,THS4509path
THS4509powerdownJP72–3,THS4509powereddown1–2,THS4509powered
on
CDCP1803powerdownJP82–3,CDCP1803powereddown1–2,CDCP1803powered
on
SLAU206BSeptember2007RevisedApril20089
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