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Chapter 6 BIOS Configuration
TI5VG Pentium VP3 ATX Motherboard User’s Manual 31
6.5 Chipset Features Setup..............................................................41
Bank DRAM Timing
DRAM Cycle Length
DRAM Bank Interleave
DRAM Read Pipeline
Sustained 3T Write
Cache Rd+CPU Wt Pipeline
Read Around Write
Cache Timing
Video BIOS Cacheable
System BIOS Cacheable
Memory Hole at 15MB Addr.
AGP
Aperture Size
AGP 2X Mode
OnChip USB
CPU Warning Temperature
Current CPU Temperature
Current System Temperature
CPU and Chassis Fan Speed
VIO / VCORE
6.6 Power Management Setup.........................................................44
Power Management
PM Control by APM
Video Off Method
Modem Use IRQ
Soft-Off by PWRBTN
HDD Power Down
Doze Mode
Suspend Mode
PM Events
6.7 PNP/PCI Configuration.............................................................47
PNP OS Installed
Resources Controlled by
Reset Configuration Data
IRQ3/4/5/7/9/10/11/12/14/15, DMA0/1/3/5/6/7 assigned to
CPU to PCI Write Buffer
PCI Dynamic Bursting
PCI Master 0 WS Write
PCI Delay Transaction