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3 - Programming the DC Source
32
Programming the Status Registers
You can use status register programming to determine the operating condition of the dc source at any
time. For example, you may program the dc source to generate an interrupt (assert SRQ) when an event
such as a current limit occurs. When the interrupt occurs, your program can then act on the event in the
appropriate fashion.
Figure 3-7 shows the status register structure of the dc source. Table 3-1 defines the status bits. The
Standard Event, Status Byte, and Service Request Enable registers and the Output Queue perform
standard GPIB functions as defined in the
IEEE 488.2 Standard Digital Interface for Programmable
Instrumentation
. The Operation Status and Questionable Status registers implement functions that are
specific to the dc source.
Power-On Conditions
Refer to the *RST command description in chapter 4 for the power-on conditions of the status registers.
Figure 3-7. DC Source Status Model
8
16
32
64
128
LOGICAL OR
STATUS BYTE
3
4
5
6
7
N.U.
QUES
MAV
ESB
MSS
OPER
SERVICE
REQUEST
GENERATION
RQS
8
16
32
128
REQUEST
ENABLE
SERVICE
1
2
16
512
1024
CONDITION
1
2
16
512
1024
EVENT
1
2
16
512
1024
ENABLE
1
2
16
512
1024
PTR/NTR
LOGICAL OR
0
1
2
4
5-8
9
10
11-13
OV
OCP
FS
OT
N.U.
RI
Unreg
N.U.
QUESTIONABLE STATUS
1
4
8
16
32
128
1
4
8
16
32
128
LOGICAL OR
OPC
N.U.
QYE
DDE
EXE
CME
N.U.
PON
EVENT ENABLE
STANDARD EVENT STATUS
DATA
DATA
DATA
OUTPUT QUEUE
QUEUE
NOT
EMPTY
1
CONDITION
1
EVENT
1
ENABLE
1
32
256
1024
2048
PTR/NTR
LOGICAL OR
0
1-4
5
6,7
8
9
10
11
12-15
OPERATION STATUS
512
CAL
N.U.
WTG
N.U.
CV
N.U.
CC+
CC-
N.U.
32
256
1024
2048
512
32
256
1024
2048
512
32
256
1024
2048
512
0
1
2
3
4
5
6
7
0-2
FLT
N.U.
3
4
444
16384 16384 1638416384
MeasOvld
14
N.U.
15
OFF
OUTPut:DFI:SOURce