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Functional Description
ARM DDI 0397G Copyright © 2006-2010 ARM. All rights reserved. 2-8
ID031010 Non-Confidential
• Timing isolation:
— from the external master
— from the network.
2.2.2 Master interfaces
The AMBA Network Interconnect supports the following master interfaces:
• AXI master interfaces
• AHB master interfaces on page 2-9
• APB master interfaces on page 2-10.
AXI master interfaces
The network supports the full AXI protocol using an AXI master interface.
Configuration options
You can configure the following AXI options:
• Address width of 32-64 bits.
• Data width of 32, 64, 128, or 256 bits.
• Data width upsize function that Upsizing data width function on page 2-12 describes.
• User sideband signal width of 0-32 bits.
• Data width downsize function that Downsizing data width function on page 2-14
describes.
• Frequency domain crossing of type:
—ASYNC
—SYNC 1:1
—SYNC 1:n
—SYNC n:1
—SYNC n:m.
• Support for the full AXI protocol.
Note
You can reduce the gate count and increase the performance if all attached master that can
access the master interface does not create any AXI lock transactions.
• Write issuing capability of 1-32 transactions.
• Read issuing capability of 1-32 transactions.
• Buffering that FIFO and clocking function on page 2-15 describes.
• Timing isolation:
— from the external slave
— from the network.