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ASUS P3B-F User’s Manual 55
4. BIOS SETUP
4. BIOS SETUP
SDRAM MA Wait State [Normal]
This controls the leadoff clocks for CPU read cycles. Leave on default set-
ting. Configuration options: [Fast] [Normal] [Slow]
Snoop Ahead [Enabled]
[Enabled] allows PCI streaming. Configuration options: [Enabled] [Disabled]
Host Bus Fast Data Ready [Disabled]
Configuration options: [Disabled] [Enabled]
16-bit I/O Recovery Time [1 BUSCLK]
Configuration options: [4 BUSCLK] [1 BUSCLK] [2 BUSCLK] [3 BUSCLK]
8-bit I/O Recovery Time [1 BUSCLK]
Configuration options: [8 BUSCLK] [1 BUSCLK] [2 BUSCLK] [3 BUSCLK]
[4 BUSCLK] [5 BUSCLK] [6 BUSCLK] [7 BUSCLK]
Graphics Aperture Size [64MB]
This feature allows you to select the size of mapped memory for AGP graphic
data. Configuration options: [4MB] [8MB] [16MB] [32MB] [64MB]
[128MB] [256MB]
Video Memory Cache Mode [UC]
USWC (uncacheable, speculative write combining) is a new cache technol-
ogy for the video memory of the processor. It can greatly improve the dis-
play speed by caching the display data. You must set this to UC (uncacheable)
if your display card cannot support this feature; otherwise your system may
not boot. Configuration options: [UC] [USWC]
PCI 2.1 Support [Enabled]
This function allows you to enable or disable PCI 2.1 features including passive
release and delayed transaction. Configuration options: [Disabled] [Enabled]
Memory Hole At 15M-16M [Disabled]
This field allows you to reserve an address space for ISA expansion cards
that require it. Configuration options: [Disabled] [Enabled]
Onboard PCI IDE Enable [Both]
You can select to enable the primary IDE channel, secondary IDE channel,
both, or disable both channels. Configuration options: [Both] [Primary] [Sec-
ondary] [Disabled]
Data Integrity Mode [Non-ECC]
[Non-ECC] has byte-wise write capability but no provision for protecting
data integrity in the DRAM array. When [EC-Only] is selected, data errors
are detected but not corrected. [ECC] with hardware scrubbing allows the
detection of single-bit and multiple-bit errors and recovery of single-bit er-
rors. This field is available only if your DIMMs have ECC. Configuration
options: [Non-ECC] [EC-Only] [ECC]
Chip Configuration