2-18
Chapter 2: BIOS information
Configure DRAM Timing by SPD [Enabled]
When this item is enabled, the DRAM timing parameters are set according to the
DRAM SPD (Serial Presence Detect). When disabled, you can manually set the
DRAM timing parameters through the DRAM sub-items. Configuration options:
[Disabled] [Enabled]
SDRAM Frequency [Auto]
Allows you to set the SDRAM operating frequency.
Configuration options: [266Mhz] [333Mhz] [400Mhz] [Auto]
DRAM CAS# Latency [2.5]
This item controls the latency between the SDRAM read command and the
time the data actually becomes available. Configuration options: [1.0 Clocks]
[2.0 Clocks] [2.5 Clocks] [3.0 Clocks]
SDRAM Bank Interleave [Disabled]
This item controls the latency between the SDRAM read command and the
time the data actually becomes available.
Configuration options: [Disabled] [2-Way] [4-Way]
NorthBridge VIA P4X400/PT800 Configuration
Select Screen
Select Item
+- Change Option
F1 General Help
F10 Save and Exit
ESC Exit
******** DRAM Timing ********
Configure SDRAM Timing by SPD [Enabled]
SDRAM Frequency [Auto]
SDRAM Burst Length [4QW]
SDRAM Command Rate [2T]
Primary Graphics Adapter [AGP]
V-Link 8X Supported [Enabled]
AGP Mode Auto
Graphics Aperture Size [64MB]
The following sub-items appear when the item Configure DRAM Timing by
SPD is set to Disabled.
SDRAM Burst Length [4QW]
Configuration options: [8QW] [4QW]
SDRAM Command Rate [2T]
Configuration options: [2T] [1T]