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Appendix
COM-2(PC)F42
Switch and Jumper Settings
Table 6.2. Switch and Jumper Settings of Sample Program 1,
2, and 5
Item
I/O Address
(SW1)
Interrupt Level
(JP1, JP2, JP3)
1
2
3
4
O
F
F
SW1
JP1
JP2
JP3
9 3 4 5 6 7 10 11121415NC
9 3 4 5 6 7 10 11121415NC
9 3 4 5 6 7 10 11121415NC
Settings
Table 6.3. Switch and Jumper Settings of Sample Program 3,
4, 6, and 10
Item
I/O Address
(SW1)
Interrupt Level
(JP1, JP2, JP3)
1
2
3
4
O
F
F
SW1
JP1
JP2
JP3
9 3 4 5 6 7 10 1112 1415NC
9 3 4 5 6 7 10 1112 1415NC
9 3 4 5 6 7 10 1112 1415NC
Settings