Cypress CY14B104M Computer Hardware User Manual


 
PRELIMINARY
CY14B104K, CY14B104M
Document #: 001-07103 Rev. *K Page 21 of 31
Software Controlled STORE and RECALL Cycle
In the following table, the software controlled STORE and RECALL cycle parameters are listed.
[28, 29]
Parameters Description
20 ns 25 ns 45 ns
Unit
Min Max Min Max Min Max
t
RC
STORE/RECALL Initiation Cycle Time 20 25 45 ns
t
SA
Address Setup Time 0 0 0 ns
t
CW
Clock Pulse Width 15 20 30 ns
t
HA
Address Hold Time 0 0 0 ns
t
RECALL
RECALL Duration 200 200 200 μs
t
SS
[32, 33]
Soft Sequence Processing Time 100 100 100 μs
Switching Waveforms
Figure 13. CE and OE Controlled Software STORE and RECALL Cycle
[29]
Figure 14. Autostore Enable and Disable Cycle
t
RC
t
RC
t
SA
t
CW
t
CW
t
SA
t
HA
t
LZCE
t
HZCE
t
HA
t
HA
t
HA
t
DELAY
t
STORE
/t
RECALL
t
HHHD
t
LZHSB
High Impedance
Address #1 Address #6Address
CE
OE
HSB(STOREonly)
DQ (DATA)
RWI
t
RC
t
RC
t
SA
t
CW
t
CW
t
SA
t
HA
t
LZCE
t
HZCE
t
HA
t
HA
t
HA
t
DELAY
Address #1 Address #6Address
CE
OE
DQ (DATA)
t
SS
Notes
28. The software sequence is clocked with CE
controlled or OE controlled reads.
29. The six consecutive addresses must be read in the order listed in Table 1. WE
must be HIGH during all six consecutive cycles.
30. This is the amount of time it takes to take action on a soft sequence command. Vcc power must remain HIGH to effectively register command.
31. Commands such as STORE and RECALL lock out IO until operation is complete which further increases this time. See the specific command.
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